Team2890/allwpilib
4
0
Fork 0
mirror of https://github.com/wpilibsuite/allwpilib synced 2026-07-02 02:51:42 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add FPGA Duty Cycle support (#1987)

Browse Source
This commit is contained in:
Thad House
2019-11-01 23:41:30 -07:00
committed by Peter Johnson
parent 509819d83f
commit 1d695a1660
42 changed files with 1744 additions and 72 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hal/src/main/native/sim/PortsInternal.h
View File

@@ -1,5 +1,5 @@
/*----------------------------------------------------------------------------*/
/* Copyright (c) 2016-2018 FIRST. All Rights Reserved. */
/* Copyright (c) 2016-2019 FIRST. All Rights Reserved. */
/* Open Source Software - may be modified and shared by FRC teams. The code */
/* must be accompanied by the FIRST BSD license file in the root directory of */
/* the project. */
@@ -28,5 +28,5 @@ constexpr int32_t kNumPCMModules = 63;
constexpr int32_t kNumSolenoidChannels = 8;
constexpr int32_t kNumPDPModules = 63;
constexpr int32_t kNumPDPChannels = 16;
constexpr int32_t kNumCanTalons = 63;
constexpr int32_t kNumDutyCycles = 8;
} // namespace hal