Add FPGA Duty Cycle support (#1987)

This commit is contained in:
Thad House
2019-11-01 23:41:30 -07:00
committed by Peter Johnson
parent 509819d83f
commit 1d695a1660
42 changed files with 1744 additions and 72 deletions

View File

@@ -19,6 +19,7 @@
namespace frc {
class AnalogInput;
class DutyCycle;
class SendableBuilder;
class AnalogTrigger : public ErrorBase,
@@ -45,6 +46,13 @@ class AnalogTrigger : public ErrorBase,
*/
explicit AnalogTrigger(AnalogInput* channel);
/**
* Construct an analog trigger given a duty cycle input.
*
* @param channel The pointer to the existing DutyCycle object
*/
explicit AnalogTrigger(DutyCycle* dutyCycle);
~AnalogTrigger() override;
AnalogTrigger(AnalogTrigger&& rhs);
@@ -60,6 +68,16 @@ class AnalogTrigger : public ErrorBase,
*/
void SetLimitsVoltage(double lower, double upper);
/**
* Set the upper and lower duty cycle limits of the analog trigger.
*
* The limits are given as floating point values between 0 and 1.
*
* @param lower The lower limit of the trigger in percentage.
* @param upper The upper limit of the trigger in percentage.
*/
void SetLimitsDutyCycle(double lower, double upper);
/**
* Set the upper and lower limits of the analog trigger.
*
@@ -82,6 +100,17 @@ class AnalogTrigger : public ErrorBase,
*/
void SetAveraged(bool useAveragedValue);
/**
* Configure the analog trigger to use the duty cycle vs. raw values.
*
* If the value is true, then the duty cycle value is selected for the analog
* trigger, otherwise the immediate value is used.
*
* @param useDutyCycle If true, use the duty cycle value, otherwise use the
* instantaneous reading
*/
void SetDutyCycle(bool useDutyCycle);
/**
* Configure the analog trigger to use a filtered value.
*
@@ -139,9 +168,9 @@ class AnalogTrigger : public ErrorBase,
void InitSendable(SendableBuilder& builder) override;
private:
int m_index;
hal::Handle<HAL_AnalogTriggerHandle> m_trigger;
AnalogInput* m_analogInput = nullptr;
DutyCycle* m_dutyCycle = nullptr;
bool m_ownsAnalog = false;
};

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@@ -0,0 +1,124 @@
/*----------------------------------------------------------------------------*/
/* Copyright (c) 2019 FIRST. All Rights Reserved. */
/* Open Source Software - may be modified and shared by FRC teams. The code */
/* must be accompanied by the FIRST BSD license file in the root directory of */
/* the project. */
/*----------------------------------------------------------------------------*/
#pragma once
#include <memory>
#include <hal/Types.h>
#include "frc/ErrorBase.h"
#include "frc/smartdashboard/Sendable.h"
#include "frc/smartdashboard/SendableHelper.h"
namespace frc {
class DigitalSource;
class AnalogTrigger;
/**
* Class to read a duty cycle PWM input.
*
* <p>PWM input signals are specified with a frequency and a ratio of high to
* low in that frequency. There are 8 of these in the roboRIO, and they can be
* attached to any DigitalSource.
*
* <p>These can be combined as the input of an AnalogTrigger to a Counter in
* order to implement rollover checking.
*
*/
class DutyCycle : public ErrorBase,
public Sendable,
public SendableHelper<DutyCycle> {
friend class AnalogTrigger;
public:
/**
* Constructs a DutyCycle input from a DigitalSource input.
*
* <p> This class does not own the inputted source.
*
* @param source The DigitalSource to use.
*/
explicit DutyCycle(DigitalSource& source);
/**
* Constructs a DutyCycle input from a DigitalSource input.
*
* <p> This class does not own the inputted source.
*
* @param source The DigitalSource to use.
*/
explicit DutyCycle(DigitalSource* source);
/**
* Constructs a DutyCycle input from a DigitalSource input.
*
* <p> This class does not own the inputted source.
*
* @param source The DigitalSource to use.
*/
explicit DutyCycle(std::shared_ptr<DigitalSource> source);
/**
* Close the DutyCycle and free all resources.
*/
~DutyCycle() override;
DutyCycle(DutyCycle&&) = default;
DutyCycle& operator=(DutyCycle&&) = default;
/**
* Get the frequency of the duty cycle signal.
*
* @return frequency in Hertz
*/
int GetFrequency() const;
/**
* Get the output ratio of the duty cycle signal.
*
* <p> 0 means always low, 1 means always high.
*
* @return output ratio between 0 and 1
*/
double GetOutput() const;
/**
* Get the raw output ratio of the duty cycle signal.
*
* <p> 0 means always low, an output equal to
* GetOutputScaleFactor() means always high.
*
* @return output ratio in raw units
*/
unsigned int GetOutputRaw() const;
/**
* Get the scale factor of the output.
*
* <p> An output equal to this value is always high, and then linearly scales
* down to 0. Divide the result of getOutputRaw by this in order to get the
* percentage between 0 and 1.
*
* @return the output scale factor
*/
unsigned int GetOutputScaleFactor() const;
/**
* Get the FPGA index for the DutyCycle.
*
* @return the FPGA index
*/
int GetFPGAIndex() const;
protected:
void InitSendable(SendableBuilder& builder) override;
private:
void InitDutyCycle();
std::shared_ptr<DigitalSource> m_source;
hal::Handle<HAL_DutyCycleHandle> m_handle;
};
} // namespace frc