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Updates to 2018 v9 image (#686)

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This commit is contained in:
Thad House
2017-10-27 00:47:56 -07:00
committed by Peter Johnson
parent f02bb058bd
commit 541753c814
25 changed files with 380 additions and 85 deletions
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8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_nInterfaceGlobals_h__
#define __nFRC_2018_18_0_1_nInterfaceGlobals_h__
#ifndef __nFRC_2018_18_0_4_nInterfaceGlobals_h__
#define __nFRC_2018_18_0_4_nInterfaceGlobals_h__
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
extern unsigned int g_currentTargetClass;
}
}
#endif // __nFRC_2018_18_0_1_nInterfaceGlobals_h__
#endif // __nFRC_2018_18_0_4_nInterfaceGlobals_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_AI_h__
#define __nFRC_2018_18_0_1_AI_h__
#ifndef __nFRC_2018_18_0_4_AI_h__
#define __nFRC_2018_18_0_4_AI_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tAI
@@ -141,4 +141,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_AI_h__
#endif // __nFRC_2018_18_0_4_AI_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_AO_h__
#define __nFRC_2018_18_0_1_AO_h__
#ifndef __nFRC_2018_18_0_4_AO_h__
#define __nFRC_2018_18_0_4_AO_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tAO
@@ -48,4 +48,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_AO_h__
#endif // __nFRC_2018_18_0_4_AO_h__

24
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Accel_h__
#define __nFRC_2018_18_0_1_Accel_h__
#ifndef __nFRC_2018_18_0_4_Accel_h__
#define __nFRC_2018_18_0_4_Accel_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tAccel
@@ -36,14 +36,6 @@ public:
virtual unsigned char readSTAT(tRioStatusCode *status) = 0;
typedef enum
{
} tCNTR_IfaceConstants;
virtual void writeCNTR(unsigned char value, tRioStatusCode *status) = 0;
virtual unsigned char readCNTR(tRioStatusCode *status) = 0;
typedef enum
{
} tDATO_IfaceConstants;
@@ -52,6 +44,14 @@ public:
virtual unsigned char readDATO(tRioStatusCode *status) = 0;
typedef enum
{
} tCNTR_IfaceConstants;
virtual void writeCNTR(unsigned char value, tRioStatusCode *status) = 0;
virtual unsigned char readCNTR(tRioStatusCode *status) = 0;
typedef enum
{
} tCNFG_IfaceConstants;
@@ -100,4 +100,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Accel_h__
#endif // __nFRC_2018_18_0_4_Accel_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Accumulator_h__
#define __nFRC_2018_18_0_1_Accumulator_h__
#ifndef __nFRC_2018_18_0_4_Accumulator_h__
#define __nFRC_2018_18_0_4_Accumulator_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tAccumulator
@@ -85,4 +85,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Accumulator_h__
#endif // __nFRC_2018_18_0_4_Accumulator_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Alarm_h__
#define __nFRC_2018_18_0_1_Alarm_h__
#ifndef __nFRC_2018_18_0_4_Alarm_h__
#define __nFRC_2018_18_0_4_Alarm_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tAlarm
@@ -55,4 +55,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Alarm_h__
#endif // __nFRC_2018_18_0_4_Alarm_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_AnalogTrigger_h__
#define __nFRC_2018_18_0_1_AnalogTrigger_h__
#ifndef __nFRC_2018_18_0_4_AnalogTrigger_h__
#define __nFRC_2018_18_0_4_AnalogTrigger_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tAnalogTrigger
@@ -127,4 +127,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_AnalogTrigger_h__
#endif // __nFRC_2018_18_0_4_AnalogTrigger_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_BIST_h__
#define __nFRC_2018_18_0_1_BIST_h__
#ifndef __nFRC_2018_18_0_4_BIST_h__
#define __nFRC_2018_18_0_4_BIST_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tBIST
@@ -88,4 +88,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_BIST_h__
#endif // __nFRC_2018_18_0_4_BIST_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Counter_h__
#define __nFRC_2018_18_0_1_Counter_h__
#ifndef __nFRC_2018_18_0_4_Counter_h__
#define __nFRC_2018_18_0_4_Counter_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tCounter
@@ -217,4 +217,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Counter_h__
#endif // __nFRC_2018_18_0_4_Counter_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_DIO_h__
#define __nFRC_2018_18_0_1_DIO_h__
#ifndef __nFRC_2018_18_0_4_DIO_h__
#define __nFRC_2018_18_0_4_DIO_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tDIO
@@ -261,4 +261,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_DIO_h__
#endif // __nFRC_2018_18_0_4_DIO_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_DMA_h__
#define __nFRC_2018_18_0_1_DMA_h__
#ifndef __nFRC_2018_18_0_4_DMA_h__
#define __nFRC_2018_18_0_4_DMA_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tDMA
@@ -195,4 +195,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_DMA_h__
#endif // __nFRC_2018_18_0_4_DMA_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Encoder_h__
#define __nFRC_2018_18_0_1_Encoder_h__
#ifndef __nFRC_2018_18_0_4_Encoder_h__
#define __nFRC_2018_18_0_4_Encoder_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tEncoder
@@ -197,4 +197,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Encoder_h__
#endif // __nFRC_2018_18_0_4_Encoder_h__

15
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Global_h__
#define __nFRC_2018_18_0_1_Global_h__
#ifndef __nFRC_2018_18_0_4_Global_h__
#define __nFRC_2018_18_0_4_Global_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tGlobal
@@ -60,6 +60,13 @@ public:
virtual bool readLEDs_RSL(tRioStatusCode *status) = 0;
typedef enum
{
} tLocalTimeUpper_IfaceConstants;
virtual unsigned int readLocalTimeUpper(tRioStatusCode *status) = 0;
typedef enum
{
} tVersion_IfaceConstants;
@@ -98,4 +105,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Global_h__
#endif // __nFRC_2018_18_0_4_Global_h__

149
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tHMB.h Normal file
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@@ -0,0 +1,149 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_4_HMB_h__
#define __nFRC_2018_18_0_4_HMB_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_4
{
class tHMB
{
public:
tHMB(){}
virtual ~tHMB(){}
virtual tSystemInterface* getSystemInterface() = 0;
static tHMB* create(tRioStatusCode *status);
typedef enum
{
kNumSystems = 1,
} tIfaceConstants;
typedef
union{
struct{
#ifdef __vxworks
unsigned Enables_AI0_Low : 1;
unsigned Enables_AI0_High : 1;
unsigned Enables_AIAveraged0_Low : 1;
unsigned Enables_AIAveraged0_High : 1;
unsigned Enables_AI1_Low : 1;
unsigned Enables_AI1_High : 1;
unsigned Enables_AIAveraged1_Low : 1;
unsigned Enables_AIAveraged1_High : 1;
unsigned Enables_Accumulator0 : 1;
unsigned Enables_Accumulator1 : 1;
unsigned Enables_DI : 1;
unsigned Enables_AnalogTriggers : 1;
unsigned Enables_Counters_Low : 1;
unsigned Enables_Counters_High : 1;
unsigned Enables_CounterTimers_Low : 1;
unsigned Enables_CounterTimers_High : 1;
unsigned Enables_Encoders_Low : 1;
unsigned Enables_Encoders_High : 1;
unsigned Enables_EncoderTimers_Low : 1;
unsigned Enables_EncoderTimers_High : 1;
#else
unsigned Enables_EncoderTimers_High : 1;
unsigned Enables_EncoderTimers_Low : 1;
unsigned Enables_Encoders_High : 1;
unsigned Enables_Encoders_Low : 1;
unsigned Enables_CounterTimers_High : 1;
unsigned Enables_CounterTimers_Low : 1;
unsigned Enables_Counters_High : 1;
unsigned Enables_Counters_Low : 1;
unsigned Enables_AnalogTriggers : 1;
unsigned Enables_DI : 1;
unsigned Enables_Accumulator1 : 1;
unsigned Enables_Accumulator0 : 1;
unsigned Enables_AIAveraged1_High : 1;
unsigned Enables_AIAveraged1_Low : 1;
unsigned Enables_AI1_High : 1;
unsigned Enables_AI1_Low : 1;
unsigned Enables_AIAveraged0_High : 1;
unsigned Enables_AIAveraged0_Low : 1;
unsigned Enables_AI0_High : 1;
unsigned Enables_AI0_Low : 1;
#endif
};
struct{
unsigned value : 20;
};
} tConfig;
typedef enum
{
} tForceOnce_IfaceConstants;
virtual void writeForceOnce(bool value, tRioStatusCode *status) = 0;
virtual bool readForceOnce(tRioStatusCode *status) = 0;
typedef enum
{
} tConfig_IfaceConstants;
virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AI0_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AI0_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AIAveraged0_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AIAveraged0_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AI1_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AI1_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AIAveraged1_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AIAveraged1_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_Accumulator0(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_Accumulator1(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_DI(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_AnalogTriggers(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_Counters_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_Counters_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_CounterTimers_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_CounterTimers_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_Encoders_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_Encoders_High(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_EncoderTimers_Low(bool value, tRioStatusCode *status) = 0;
virtual void writeConfig_Enables_EncoderTimers_High(bool value, tRioStatusCode *status) = 0;
virtual tConfig readConfig(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AI0_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AI0_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AIAveraged0_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AIAveraged0_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AI1_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AI1_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AIAveraged1_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AIAveraged1_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_Accumulator0(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_Accumulator1(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_DI(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_AnalogTriggers(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_Counters_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_Counters_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_CounterTimers_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_CounterTimers_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_Encoders_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_Encoders_High(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_EncoderTimers_Low(tRioStatusCode *status) = 0;
virtual bool readConfig_Enables_EncoderTimers_High(tRioStatusCode *status) = 0;
private:
tHMB(const tHMB&);
void operator=(const tHMB&);
};
}
}
#endif // __nFRC_2018_18_0_4_HMB_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Interrupt_h__
#define __nFRC_2018_18_0_1_Interrupt_h__
#ifndef __nFRC_2018_18_0_4_Interrupt_h__
#define __nFRC_2018_18_0_4_Interrupt_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tInterrupt
@@ -98,4 +98,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Interrupt_h__
#endif // __nFRC_2018_18_0_4_Interrupt_h__

22
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_PWM_h__
#define __nFRC_2018_18_0_1_PWM_h__
#ifndef __nFRC_2018_18_0_4_PWM_h__
#define __nFRC_2018_18_0_4_PWM_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tPWM
@@ -44,6 +44,13 @@ public:
typedef enum
{
} tCycleStartTime_IfaceConstants;
virtual unsigned int readCycleStartTime(tRioStatusCode *status) = 0;
typedef enum
{
} tConfig_IfaceConstants;
@@ -56,6 +63,13 @@ public:
virtual unsigned short readConfig_MinHigh(tRioStatusCode *status) = 0;
typedef enum
{
} tCycleStartTimeUpper_IfaceConstants;
virtual unsigned int readCycleStartTimeUpper(tRioStatusCode *status) = 0;
typedef enum
{
} tLoopTiming_IfaceConstants;
@@ -118,4 +132,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_PWM_h__
#endif // __nFRC_2018_18_0_4_PWM_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h
View File

@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Power_h__
#define __nFRC_2018_18_0_1_Power_h__
#ifndef __nFRC_2018_18_0_4_Power_h__
#define __nFRC_2018_18_0_4_Power_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tPower
@@ -218,4 +218,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Power_h__
#endif // __nFRC_2018_18_0_4_Power_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h
View File

@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_Relay_h__
#define __nFRC_2018_18_0_1_Relay_h__
#ifndef __nFRC_2018_18_0_4_Relay_h__
#define __nFRC_2018_18_0_4_Relay_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tRelay
@@ -66,4 +66,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_Relay_h__
#endif // __nFRC_2018_18_0_4_Relay_h__

130
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h
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@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_SPI_h__
#define __nFRC_2018_18_0_1_SPI_h__
#ifndef __nFRC_2018_18_0_4_SPI_h__
#define __nFRC_2018_18_0_4_SPI_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tSPI
@@ -26,6 +26,27 @@ public:
kNumSystems = 1,
} tIfaceConstants;
typedef
union{
struct{
#ifdef __vxworks
unsigned ExternalClockSource_Channel : 4;
unsigned ExternalClockSource_Module : 1;
unsigned ExternalClockSource_AnalogTrigger : 1;
unsigned RisingEdge : 1;
unsigned FallingEdge : 1;
#else
unsigned FallingEdge : 1;
unsigned RisingEdge : 1;
unsigned ExternalClockSource_AnalogTrigger : 1;
unsigned ExternalClockSource_Module : 1;
unsigned ExternalClockSource_Channel : 4;
#endif
};
struct{
unsigned value : 8;
};
} tAutoTriggerConfig;
typedef
union{
struct{
@@ -44,6 +65,97 @@ public:
typedef enum
{
} tDebugIntStatReadCount_IfaceConstants;
virtual unsigned int readDebugIntStatReadCount(tRioStatusCode *status) = 0;
typedef enum
{
} tDebugState_IfaceConstants;
virtual unsigned short readDebugState(tRioStatusCode *status) = 0;
typedef enum
{
} tAutoTriggerConfig_IfaceConstants;
virtual void writeAutoTriggerConfig(tAutoTriggerConfig value, tRioStatusCode *status) = 0;
virtual void writeAutoTriggerConfig_ExternalClockSource_Channel(unsigned char value, tRioStatusCode *status) = 0;
virtual void writeAutoTriggerConfig_ExternalClockSource_Module(unsigned char value, tRioStatusCode *status) = 0;
virtual void writeAutoTriggerConfig_ExternalClockSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0;
virtual void writeAutoTriggerConfig_RisingEdge(bool value, tRioStatusCode *status) = 0;
virtual void writeAutoTriggerConfig_FallingEdge(bool value, tRioStatusCode *status) = 0;
virtual tAutoTriggerConfig readAutoTriggerConfig(tRioStatusCode *status) = 0;
virtual unsigned char readAutoTriggerConfig_ExternalClockSource_Channel(tRioStatusCode *status) = 0;
virtual unsigned char readAutoTriggerConfig_ExternalClockSource_Module(tRioStatusCode *status) = 0;
virtual bool readAutoTriggerConfig_ExternalClockSource_AnalogTrigger(tRioStatusCode *status) = 0;
virtual bool readAutoTriggerConfig_RisingEdge(tRioStatusCode *status) = 0;
virtual bool readAutoTriggerConfig_FallingEdge(tRioStatusCode *status) = 0;
typedef enum
{
} tAutoChipSelect_IfaceConstants;
virtual void writeAutoChipSelect(unsigned char value, tRioStatusCode *status) = 0;
virtual unsigned char readAutoChipSelect(tRioStatusCode *status) = 0;
typedef enum
{
} tAutoForceGo_IfaceConstants;
virtual void strobeAutoForceGo(tRioStatusCode *status) = 0;
typedef enum
{
} tDebugRevision_IfaceConstants;
virtual unsigned int readDebugRevision(tRioStatusCode *status) = 0;
typedef enum
{
} tAutoByteCount_IfaceConstants;
virtual void writeAutoByteCount(unsigned char value, tRioStatusCode *status) = 0;
virtual unsigned char readAutoByteCount(tRioStatusCode *status) = 0;
typedef enum
{
} tDebugIntStat_IfaceConstants;
virtual unsigned int readDebugIntStat(tRioStatusCode *status) = 0;
typedef enum
{
} tDebugEnabled_IfaceConstants;
virtual unsigned int readDebugEnabled(tRioStatusCode *status) = 0;
typedef enum
{
} tAutoSPI1Select_IfaceConstants;
virtual void writeAutoSPI1Select(bool value, tRioStatusCode *status) = 0;
virtual bool readAutoSPI1Select(tRioStatusCode *status) = 0;
typedef enum
{
} tDebugSubstate_IfaceConstants;
virtual unsigned char readDebugSubstate(tRioStatusCode *status) = 0;
typedef enum
{
} tEnableDIO_IfaceConstants;
@@ -66,6 +178,16 @@ public:
typedef enum
{
kNumAutoTxRegisters = 4,
kNumAutoTxElements = 4,
} tAutoTx_IfaceConstants;
virtual void writeAutoTx(unsigned char reg_index, unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0;
virtual unsigned char readAutoTx(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0;
private:
tSPI(const tSPI&);
void operator=(const tSPI&);
@@ -74,4 +196,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_SPI_h__
#endif // __nFRC_2018_18_0_4_SPI_h__

8
ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h
View File

@@ -1,15 +1,15 @@
// Copyright (c) National Instruments 2008. All Rights Reserved.
// Do Not Edit... this file is generated!
#ifndef __nFRC_2018_18_0_1_SysWatchdog_h__
#define __nFRC_2018_18_0_1_SysWatchdog_h__
#ifndef __nFRC_2018_18_0_4_SysWatchdog_h__
#define __nFRC_2018_18_0_4_SysWatchdog_h__
#include "../tSystem.h"
#include "../tSystemInterface.h"
namespace nFPGA
{
namespace nFRC_2018_18_0_1
namespace nFRC_2018_18_0_4
{
class tSysWatchdog
@@ -106,4 +106,4 @@ private:
}
}
#endif // __nFRC_2018_18_0_1_SysWatchdog_h__
#endif // __nFRC_2018_18_0_4_SysWatchdog_h__