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[wpilib] Rename SysIdRoutineLog constants to all caps

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This commit is contained in:
Peter Johnson
2026-03-17 16:39:10 -07:00
parent 8fa6976cb2
commit 6559d78658
9 changed files with 54 additions and 54 deletions
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12
commandsv2/src/main/java/org/wpilib/command2/sysid/SysIdRoutine.java
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@@ -208,9 +208,9 @@ public class SysIdRoutine extends SysIdRoutineLog {
public Command quasistatic(Direction direction) {
State state;
if (direction == Direction.kForward) {
state = State.kQuasistaticForward;
state = State.QUASISTATIC_FORWARD;
} else { // if (direction == Direction.kReverse) {
state = State.kQuasistaticReverse;
state = State.QUASISTATIC_REVERSE;
}
double outputSign = direction == Direction.kForward ? 1.0 : -1.0;
@@ -230,7 +230,7 @@ public class SysIdRoutine extends SysIdRoutineLog {
.finallyDo(
() -> {
m_mechanism.m_drive.accept(Volts.of(0));
m_recordState.accept(State.kNone);
m_recordState.accept(State.NONE);
timer.stop();
})
.withName("sysid-" + state.toString() + "-" + m_mechanism.m_name)
@@ -251,8 +251,8 @@ public class SysIdRoutine extends SysIdRoutineLog {
double outputSign = direction == Direction.kForward ? 1.0 : -1.0;
State state =
Map.ofEntries(
entry(Direction.kForward, State.kDynamicForward),
entry(Direction.kReverse, State.kDynamicReverse))
entry(Direction.kForward, State.DYNAMIC_FORWARD),
entry(Direction.kReverse, State.DYNAMIC_REVERSE))
.get(direction);
Voltage[] output = {Volts.zero()};
@@ -269,7 +269,7 @@ public class SysIdRoutine extends SysIdRoutineLog {
.finallyDo(
() -> {
m_mechanism.m_drive.accept(Volts.of(0));
m_recordState.accept(State.kNone);
m_recordState.accept(State.NONE);
})
.withName("sysid-" + state.toString() + "-" + m_mechanism.m_name)
.withTimeout(m_config.m_timeout.in(Seconds));

12
commandsv2/src/main/native/cpp/frc2/command/sysid/SysIdRoutine.cpp
View File

@@ -11,9 +11,9 @@ using namespace wpi::cmd::sysid;
wpi::cmd::CommandPtr SysIdRoutine::Quasistatic(Direction direction) {
wpi::sysid::State state;
if (direction == Direction::kForward) {
state = wpi::sysid::State::kQuasistaticForward;
state = wpi::sysid::State::QUASISTATIC_FORWARD;
} else { // if (direction == Direction::kReverse) {
state = wpi::sysid::State::kQuasistaticReverse;
state = wpi::sysid::State::QUASISTATIC_REVERSE;
}
double outputSign = direction == Direction::kForward ? 1.0 : -1.0;
@@ -29,7 +29,7 @@ wpi::cmd::CommandPtr SysIdRoutine::Quasistatic(Direction direction) {
})
.FinallyDo([this] {
m_mechanism.m_drive(0_V);
m_recordState(wpi::sysid::State::kNone);
m_recordState(wpi::sysid::State::NONE);
timer.Stop();
})
.WithName("sysid-" +
@@ -41,9 +41,9 @@ wpi::cmd::CommandPtr SysIdRoutine::Quasistatic(Direction direction) {
wpi::cmd::CommandPtr SysIdRoutine::Dynamic(Direction direction) {
wpi::sysid::State state;
if (direction == Direction::kForward) {
state = wpi::sysid::State::kDynamicForward;
state = wpi::sysid::State::DYNAMIC_FORWARD;
} else { // if (direction == Direction::kReverse) {
state = wpi::sysid::State::kDynamicReverse;
state = wpi::sysid::State::DYNAMIC_REVERSE;
}
double outputSign = direction == Direction::kForward ? 1.0 : -1.0;
@@ -57,7 +57,7 @@ wpi::cmd::CommandPtr SysIdRoutine::Dynamic(Direction direction) {
}))
.FinallyDo([this] {
m_mechanism.m_drive(0_V);
m_recordState(wpi::sysid::State::kNone);
m_recordState(wpi::sysid::State::NONE);
})
.WithName("sysid-" +
wpi::sysid::SysIdRoutineLog::StateEnumToString(state) + "-" +

12
commandsv2/src/main/python/commands2/sysid/sysidroutine.py
View File

@@ -115,9 +115,9 @@ class SysIdRoutine(SysIdRoutineLog):
timer = Timer()
if direction == self.Direction.kForward:
state = State.kQuasistaticForward
state = State.QUASISTATIC_FORWARD
else:
state = State.kQuasistaticReverse
state = State.QUASISTATIC_REVERSE
def execute():
self.outputVolts = direction.value * timer.get() * self.config.rampRate
@@ -127,7 +127,7 @@ class SysIdRoutine(SysIdRoutineLog):
def end(interrupted: bool):
self.mechanism.drive(0.0)
self.logState(State.kNone)
self.logState(State.NONE)
timer.stop()
return (
@@ -151,9 +151,9 @@ class SysIdRoutine(SysIdRoutineLog):
"""
if direction == self.Direction.kForward:
state = State.kDynamicForward
state = State.DYNAMIC_FORWARD
else:
state = State.kDynamicReverse
state = State.DYNAMIC_REVERSE
def command():
self.outputVolts = direction.value * self.config.stepVoltage
@@ -165,7 +165,7 @@ class SysIdRoutine(SysIdRoutineLog):
def end(interrupted: bool):
self.mechanism.drive(0.0)
self.logState(State.kNone)
self.logState(State.NONE)
return (
self.mechanism.subsystem.runOnce(command)

16
commandsv2/src/test/java/org/wpilib/command2/sysid/SysIdRoutineTest.java
View File

@@ -74,36 +74,36 @@ class SysIdRoutineTest {
var orderCheck = inOrder(m_mechanism);
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.kQuasistaticForward);
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.QUASISTATIC_FORWARD);
orderCheck.verify(m_mechanism).drive(any());
orderCheck.verify(m_mechanism).log(any());
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.kNone);
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.NONE);
orderCheck.verifyNoMoreInteractions();
clearInvocations(m_mechanism);
orderCheck = inOrder(m_mechanism);
runCommand(m_dynamicForward);
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.kDynamicForward);
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.DYNAMIC_FORWARD);
orderCheck.verify(m_mechanism).drive(any());
orderCheck.verify(m_mechanism).log(any());
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.kNone);
orderCheck.verify(m_mechanism).recordState(SysIdRoutineLog.State.NONE);
orderCheck.verifyNoMoreInteractions();
}
@Test
void testsDeclareCorrectState() {
runCommand(m_quasistaticForward);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.kQuasistaticForward);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.QUASISTATIC_FORWARD);
runCommand(m_quasistaticReverse);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.kQuasistaticReverse);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.QUASISTATIC_REVERSE);
runCommand(m_dynamicForward);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.kDynamicForward);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.DYNAMIC_FORWARD);
runCommand(m_dynamicReverse);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.kDynamicReverse);
verify(m_mechanism, atLeastOnce()).recordState(SysIdRoutineLog.State.DYNAMIC_REVERSE);
}
@Test

10
commandsv2/src/test/native/cpp/wpi/command/sysid/SysIdRoutineTest.cpp
View File

@@ -38,19 +38,19 @@ class SysIdRoutineTest : public ::testing::Test {
std::nullopt, std::nullopt, std::nullopt,
[this](wpi::sysid::State state) {
switch (state) {
case wpi::sysid::State::kQuasistaticForward:
case wpi::sysid::State::QUASISTATIC_FORWARD:
currentStateList.emplace_back(StateTest::InRecordStateQf);
break;
case wpi::sysid::State::kQuasistaticReverse:
case wpi::sysid::State::QUASISTATIC_REVERSE:
currentStateList.emplace_back(StateTest::InRecordStateQr);
break;
case wpi::sysid::State::kDynamicForward:
case wpi::sysid::State::DYNAMIC_FORWARD:
currentStateList.emplace_back(StateTest::InRecordStateDf);
break;
case wpi::sysid::State::kDynamicReverse:
case wpi::sysid::State::DYNAMIC_REVERSE:
currentStateList.emplace_back(StateTest::InRecordStateDr);
break;
case wpi::sysid::State::kNone:
case wpi::sysid::State::NONE:
currentStateList.emplace_back(StateTest::DoneWithRecordState);
break;
}

16
commandsv2/src/test/python/test_sysidroutine.py
View File

@@ -75,9 +75,9 @@ def test_record_state_bookends_motor_logging(
[
call.drive(ANY),
call.log(ANY),
call.recordState(State.kQuasistaticForward),
call.recordState(State.QUASISTATIC_FORWARD),
call.drive(ANY),
call.recordState(State.kNone),
call.recordState(State.NONE),
],
any_order=False,
)
@@ -89,9 +89,9 @@ def test_record_state_bookends_motor_logging(
[
call.drive(ANY),
call.log(ANY),
call.recordState(State.kDynamicForward),
call.recordState(State.DYNAMIC_FORWARD),
call.drive(ANY),
call.recordState(State.kNone),
call.recordState(State.NONE),
],
any_order=False,
)
@@ -105,16 +105,16 @@ def test_tests_declare_correct_state(
dynamic_reverse,
):
run_command(quasistatic_forward)
mechanism.recordState.assert_any_call(State.kQuasistaticForward)
mechanism.recordState.assert_any_call(State.QUASISTATIC_FORWARD)
run_command(quasistatic_reverse)
mechanism.recordState.assert_any_call(State.kQuasistaticReverse)
mechanism.recordState.assert_any_call(State.QUASISTATIC_REVERSE)
run_command(dynamic_forward)
mechanism.recordState.assert_any_call(State.kDynamicForward)
mechanism.recordState.assert_any_call(State.DYNAMIC_FORWARD)
run_command(dynamic_reverse)
mechanism.recordState.assert_any_call(State.kDynamicReverse)
mechanism.recordState.assert_any_call(State.DYNAMIC_REVERSE)
def test_tests_output_correct_voltage(