mirror of
https://github.com/wpilibsuite/allwpilib
synced 2026-07-02 02:51:42 +00:00
Updates image to 2018 v10 image (#713)
This commit is contained in:
committed by
Peter Johnson
parent
f4dce9e608
commit
6e9d1f55c6
@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_nInterfaceGlobals_h__
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#define __nFRC_2018_18_0_4_nInterfaceGlobals_h__
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#ifndef __nFRC_2018_18_0_5_nInterfaceGlobals_h__
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#define __nFRC_2018_18_0_5_nInterfaceGlobals_h__
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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extern unsigned int g_currentTargetClass;
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}
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}
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#endif // __nFRC_2018_18_0_4_nInterfaceGlobals_h__
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#endif // __nFRC_2018_18_0_5_nInterfaceGlobals_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_AI_h__
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#define __nFRC_2018_18_0_4_AI_h__
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#ifndef __nFRC_2018_18_0_5_AI_h__
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#define __nFRC_2018_18_0_5_AI_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tAI
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@@ -141,4 +141,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_AI_h__
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#endif // __nFRC_2018_18_0_5_AI_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_AO_h__
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#define __nFRC_2018_18_0_4_AO_h__
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#ifndef __nFRC_2018_18_0_5_AO_h__
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#define __nFRC_2018_18_0_5_AO_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tAO
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@@ -48,4 +48,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_AO_h__
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#endif // __nFRC_2018_18_0_5_AO_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Accel_h__
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#define __nFRC_2018_18_0_4_Accel_h__
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#ifndef __nFRC_2018_18_0_5_Accel_h__
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#define __nFRC_2018_18_0_5_Accel_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tAccel
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@@ -100,4 +100,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Accel_h__
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#endif // __nFRC_2018_18_0_5_Accel_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Accumulator_h__
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#define __nFRC_2018_18_0_4_Accumulator_h__
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#ifndef __nFRC_2018_18_0_5_Accumulator_h__
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#define __nFRC_2018_18_0_5_Accumulator_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tAccumulator
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@@ -85,4 +85,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Accumulator_h__
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#endif // __nFRC_2018_18_0_5_Accumulator_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Alarm_h__
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#define __nFRC_2018_18_0_4_Alarm_h__
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#ifndef __nFRC_2018_18_0_5_Alarm_h__
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#define __nFRC_2018_18_0_5_Alarm_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tAlarm
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@@ -55,4 +55,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Alarm_h__
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#endif // __nFRC_2018_18_0_5_Alarm_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_AnalogTrigger_h__
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#define __nFRC_2018_18_0_4_AnalogTrigger_h__
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#ifndef __nFRC_2018_18_0_5_AnalogTrigger_h__
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#define __nFRC_2018_18_0_5_AnalogTrigger_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tAnalogTrigger
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@@ -127,4 +127,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_AnalogTrigger_h__
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#endif // __nFRC_2018_18_0_5_AnalogTrigger_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_BIST_h__
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#define __nFRC_2018_18_0_4_BIST_h__
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#ifndef __nFRC_2018_18_0_5_BIST_h__
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#define __nFRC_2018_18_0_5_BIST_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tBIST
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@@ -88,4 +88,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_BIST_h__
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#endif // __nFRC_2018_18_0_5_BIST_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Counter_h__
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#define __nFRC_2018_18_0_4_Counter_h__
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#ifndef __nFRC_2018_18_0_5_Counter_h__
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#define __nFRC_2018_18_0_5_Counter_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tCounter
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@@ -217,4 +217,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Counter_h__
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#endif // __nFRC_2018_18_0_5_Counter_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_DIO_h__
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#define __nFRC_2018_18_0_4_DIO_h__
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#ifndef __nFRC_2018_18_0_5_DIO_h__
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#define __nFRC_2018_18_0_5_DIO_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tDIO
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@@ -261,4 +261,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_DIO_h__
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#endif // __nFRC_2018_18_0_5_DIO_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_DMA_h__
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#define __nFRC_2018_18_0_4_DMA_h__
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#ifndef __nFRC_2018_18_0_5_DMA_h__
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#define __nFRC_2018_18_0_5_DMA_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tDMA
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@@ -195,4 +195,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_DMA_h__
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#endif // __nFRC_2018_18_0_5_DMA_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Encoder_h__
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#define __nFRC_2018_18_0_4_Encoder_h__
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#ifndef __nFRC_2018_18_0_5_Encoder_h__
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#define __nFRC_2018_18_0_5_Encoder_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tEncoder
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@@ -197,4 +197,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Encoder_h__
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#endif // __nFRC_2018_18_0_5_Encoder_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Global_h__
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#define __nFRC_2018_18_0_4_Global_h__
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#ifndef __nFRC_2018_18_0_5_Global_h__
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#define __nFRC_2018_18_0_5_Global_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tGlobal
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@@ -105,4 +105,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Global_h__
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#endif // __nFRC_2018_18_0_5_Global_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_HMB_h__
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#define __nFRC_2018_18_0_4_HMB_h__
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#ifndef __nFRC_2018_18_0_5_HMB_h__
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#define __nFRC_2018_18_0_5_HMB_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tHMB
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@@ -146,4 +146,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_HMB_h__
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#endif // __nFRC_2018_18_0_5_HMB_h__
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@@ -1,15 +1,15 @@
|
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_Interrupt_h__
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#define __nFRC_2018_18_0_4_Interrupt_h__
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#ifndef __nFRC_2018_18_0_5_Interrupt_h__
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#define __nFRC_2018_18_0_5_Interrupt_h__
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#include "../tSystem.h"
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#include "../tSystemInterface.h"
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namespace nFPGA
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{
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namespace nFRC_2018_18_0_4
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namespace nFRC_2018_18_0_5
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{
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class tInterrupt
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@@ -98,4 +98,4 @@ private:
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}
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}
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#endif // __nFRC_2018_18_0_4_Interrupt_h__
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#endif // __nFRC_2018_18_0_5_Interrupt_h__
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@@ -1,15 +1,15 @@
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// Copyright (c) National Instruments 2008. All Rights Reserved.
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// Do Not Edit... this file is generated!
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#ifndef __nFRC_2018_18_0_4_PWM_h__
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#define __nFRC_2018_18_0_4_PWM_h__
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#ifndef __nFRC_2018_18_0_5_PWM_h__
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||||
#define __nFRC_2018_18_0_5_PWM_h__
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||||
|
||||
#include "../tSystem.h"
|
||||
#include "../tSystemInterface.h"
|
||||
|
||||
namespace nFPGA
|
||||
{
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||||
namespace nFRC_2018_18_0_4
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||||
namespace nFRC_2018_18_0_5
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||||
{
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||||
|
||||
class tPWM
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||||
@@ -132,4 +132,4 @@ private:
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||||
}
|
||||
}
|
||||
|
||||
#endif // __nFRC_2018_18_0_4_PWM_h__
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||||
#endif // __nFRC_2018_18_0_5_PWM_h__
|
||||
|
||||
@@ -1,15 +1,15 @@
|
||||
// Copyright (c) National Instruments 2008. All Rights Reserved.
|
||||
// Do Not Edit... this file is generated!
|
||||
|
||||
#ifndef __nFRC_2018_18_0_4_Power_h__
|
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#define __nFRC_2018_18_0_4_Power_h__
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#ifndef __nFRC_2018_18_0_5_Power_h__
|
||||
#define __nFRC_2018_18_0_5_Power_h__
|
||||
|
||||
#include "../tSystem.h"
|
||||
#include "../tSystemInterface.h"
|
||||
|
||||
namespace nFPGA
|
||||
{
|
||||
namespace nFRC_2018_18_0_4
|
||||
namespace nFRC_2018_18_0_5
|
||||
{
|
||||
|
||||
class tPower
|
||||
@@ -218,4 +218,4 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
#endif // __nFRC_2018_18_0_4_Power_h__
|
||||
#endif // __nFRC_2018_18_0_5_Power_h__
|
||||
|
||||
@@ -1,15 +1,15 @@
|
||||
// Copyright (c) National Instruments 2008. All Rights Reserved.
|
||||
// Do Not Edit... this file is generated!
|
||||
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||||
#ifndef __nFRC_2018_18_0_4_Relay_h__
|
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#define __nFRC_2018_18_0_4_Relay_h__
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#ifndef __nFRC_2018_18_0_5_Relay_h__
|
||||
#define __nFRC_2018_18_0_5_Relay_h__
|
||||
|
||||
#include "../tSystem.h"
|
||||
#include "../tSystemInterface.h"
|
||||
|
||||
namespace nFPGA
|
||||
{
|
||||
namespace nFRC_2018_18_0_4
|
||||
namespace nFRC_2018_18_0_5
|
||||
{
|
||||
|
||||
class tRelay
|
||||
@@ -66,4 +66,4 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
#endif // __nFRC_2018_18_0_4_Relay_h__
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||||
#endif // __nFRC_2018_18_0_5_Relay_h__
|
||||
|
||||
@@ -1,15 +1,15 @@
|
||||
// Copyright (c) National Instruments 2008. All Rights Reserved.
|
||||
// Do Not Edit... this file is generated!
|
||||
|
||||
#ifndef __nFRC_2018_18_0_4_SPI_h__
|
||||
#define __nFRC_2018_18_0_4_SPI_h__
|
||||
#ifndef __nFRC_2018_18_0_5_SPI_h__
|
||||
#define __nFRC_2018_18_0_5_SPI_h__
|
||||
|
||||
#include "../tSystem.h"
|
||||
#include "../tSystemInterface.h"
|
||||
|
||||
namespace nFPGA
|
||||
{
|
||||
namespace nFRC_2018_18_0_4
|
||||
namespace nFRC_2018_18_0_5
|
||||
{
|
||||
|
||||
class tSPI
|
||||
@@ -35,7 +35,9 @@ public:
|
||||
unsigned ExternalClockSource_AnalogTrigger : 1;
|
||||
unsigned RisingEdge : 1;
|
||||
unsigned FallingEdge : 1;
|
||||
unsigned ExternalClock : 1;
|
||||
#else
|
||||
unsigned ExternalClock : 1;
|
||||
unsigned FallingEdge : 1;
|
||||
unsigned RisingEdge : 1;
|
||||
unsigned ExternalClockSource_AnalogTrigger : 1;
|
||||
@@ -44,7 +46,7 @@ public:
|
||||
#endif
|
||||
};
|
||||
struct{
|
||||
unsigned value : 8;
|
||||
unsigned value : 9;
|
||||
};
|
||||
} tAutoTriggerConfig;
|
||||
typedef
|
||||
@@ -89,12 +91,14 @@ public:
|
||||
virtual void writeAutoTriggerConfig_ExternalClockSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0;
|
||||
virtual void writeAutoTriggerConfig_RisingEdge(bool value, tRioStatusCode *status) = 0;
|
||||
virtual void writeAutoTriggerConfig_FallingEdge(bool value, tRioStatusCode *status) = 0;
|
||||
virtual void writeAutoTriggerConfig_ExternalClock(bool value, tRioStatusCode *status) = 0;
|
||||
virtual tAutoTriggerConfig readAutoTriggerConfig(tRioStatusCode *status) = 0;
|
||||
virtual unsigned char readAutoTriggerConfig_ExternalClockSource_Channel(tRioStatusCode *status) = 0;
|
||||
virtual unsigned char readAutoTriggerConfig_ExternalClockSource_Module(tRioStatusCode *status) = 0;
|
||||
virtual bool readAutoTriggerConfig_ExternalClockSource_AnalogTrigger(tRioStatusCode *status) = 0;
|
||||
virtual bool readAutoTriggerConfig_RisingEdge(tRioStatusCode *status) = 0;
|
||||
virtual bool readAutoTriggerConfig_FallingEdge(tRioStatusCode *status) = 0;
|
||||
virtual bool readAutoTriggerConfig_ExternalClock(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
typedef enum
|
||||
@@ -105,13 +109,6 @@ public:
|
||||
virtual unsigned char readAutoChipSelect(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
} tAutoForceGo_IfaceConstants;
|
||||
|
||||
virtual void strobeAutoForceGo(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
} tDebugRevision_IfaceConstants;
|
||||
@@ -156,6 +153,14 @@ public:
|
||||
virtual unsigned char readDebugSubstate(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
} tAutoRate_IfaceConstants;
|
||||
|
||||
virtual void writeAutoRate(unsigned int value, tRioStatusCode *status) = 0;
|
||||
virtual unsigned int readAutoRate(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
} tEnableDIO_IfaceConstants;
|
||||
@@ -176,6 +181,13 @@ public:
|
||||
virtual unsigned char readChipSelectActiveHigh_MXP(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
} tAutoForceOne_IfaceConstants;
|
||||
|
||||
virtual void strobeAutoForceOne(tRioStatusCode *status) = 0;
|
||||
|
||||
|
||||
|
||||
|
||||
typedef enum
|
||||
@@ -196,4 +208,4 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
#endif // __nFRC_2018_18_0_4_SPI_h__
|
||||
#endif // __nFRC_2018_18_0_5_SPI_h__
|
||||
|
||||
@@ -1,15 +1,15 @@
|
||||
// Copyright (c) National Instruments 2008. All Rights Reserved.
|
||||
// Do Not Edit... this file is generated!
|
||||
|
||||
#ifndef __nFRC_2018_18_0_4_SysWatchdog_h__
|
||||
#define __nFRC_2018_18_0_4_SysWatchdog_h__
|
||||
#ifndef __nFRC_2018_18_0_5_SysWatchdog_h__
|
||||
#define __nFRC_2018_18_0_5_SysWatchdog_h__
|
||||
|
||||
#include "../tSystem.h"
|
||||
#include "../tSystemInterface.h"
|
||||
|
||||
namespace nFPGA
|
||||
{
|
||||
namespace nFRC_2018_18_0_4
|
||||
namespace nFRC_2018_18_0_5
|
||||
{
|
||||
|
||||
class tSysWatchdog
|
||||
@@ -106,4 +106,4 @@ private:
|
||||
}
|
||||
}
|
||||
|
||||
#endif // __nFRC_2018_18_0_4_SysWatchdog_h__
|
||||
#endif // __nFRC_2018_18_0_5_SysWatchdog_h__
|
||||
|
||||
Reference in New Issue
Block a user