diff --git a/hal/include/HAL/Digital.hpp b/hal/include/HAL/Digital.hpp index 1b2d07d7e1..8c92f4e51a 100644 --- a/hal/include/HAL/Digital.hpp +++ b/hal/include/HAL/Digital.hpp @@ -63,8 +63,6 @@ extern "C" void setCounterPulseLengthMode(void* counter_pointer, double threshold, int32_t *status); int32_t getCounterSamplesToAverage(void* counter_pointer, int32_t *status); void setCounterSamplesToAverage(void* counter_pointer, int samplesToAverage, int32_t *status); - void startCounter(void* counter_pointer, int32_t *status); - void stopCounter(void* counter_pointer, int32_t *status); void resetCounter(void* counter_pointer, int32_t *status); int32_t getCounter(void* counter_pointer, int32_t *status); double getCounterPeriod(void* counter_pointer, int32_t *status); @@ -78,8 +76,6 @@ extern "C" uint8_t port_b_module, uint32_t port_b_pin, bool port_b_analog_trigger, bool reverseDirection, int32_t *index, int32_t *status); // TODO: fix routing void freeEncoder(void* encoder_pointer, int32_t *status); - void startEncoder(void* encoder_pointer, int32_t *status); - void stopEncoder(void* encoder_pointer, int32_t *status); void resetEncoder(void* encoder_pointer, int32_t *status); int32_t getEncoder(void* encoder_pointer, int32_t *status); // Raw value double getEncoderPeriod(void* encoder_pointer, int32_t *status); diff --git a/hal/include/HAL/Interrupts.hpp b/hal/include/HAL/Interrupts.hpp index f5614f5843..636e809036 100644 --- a/hal/include/HAL/Interrupts.hpp +++ b/hal/include/HAL/Interrupts.hpp @@ -16,10 +16,11 @@ extern "C" void* initializeInterrupts(uint32_t interruptIndex, bool watcher, int32_t *status); void cleanInterrupts(void* interrupt_pointer, int32_t *status); - void waitForInterrupt(void* interrupt_pointer, double timeout, int32_t *status); + uint32_t waitForInterrupt(void* interrupt_pointer, double timeout, bool ignorePrevious, int32_t *status); void enableInterrupts(void* interrupt_pointer, int32_t *status); void disableInterrupts(void* interrupt_pointer, int32_t *status); - double readInterruptTimestamp(void* interrupt_pointer, int32_t *status); + double readRisingTimestamp(void* interrupt_pointer, int32_t *status); + double readFallingTimestamp(void* interrupt_pointer, int32_t *status); void requestInterrupts(void* interrupt_pointer, uint8_t routing_module, uint32_t routing_pin, bool routing_analog_trigger, int32_t *status); void attachInterruptHandler(void* interrupt_pointer, InterruptHandlerFunction handler, diff --git a/hal/lib/Athena/ChipObject.h b/hal/lib/Athena/ChipObject.h index b726306d48..630c34d29f 100644 --- a/hal/lib/Athena/ChipObject.h +++ b/hal/lib/Athena/ChipObject.h @@ -11,6 +11,7 @@ #include #include "FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h" +#include "FRC_FPGA_ChipObject/tDMAChannelDescriptor.h" #include "FRC_FPGA_ChipObject/tDMAManager.h" #include "FRC_FPGA_ChipObject/tInterruptManager.h" #include "FRC_FPGA_ChipObject/tSystem.h" diff --git a/hal/lib/Athena/Digital.cpp b/hal/lib/Athena/Digital.cpp index b7b4c5b91f..de992cdc65 100644 --- a/hal/lib/Athena/Digital.cpp +++ b/hal/lib/Athena/Digital.cpp @@ -683,14 +683,11 @@ void setCounterUpSourceEdge(void* counter_pointer, bool risingEdge, bool falling */ void clearCounterUpSource(void* counter_pointer, int32_t *status) { Counter* counter = (Counter*) counter_pointer; - bool state = counter->counter->readConfig_Enable(status); - counter->counter->writeConfig_Enable(false, status); counter->counter->writeConfig_UpFallingEdge(false, status); counter->counter->writeConfig_UpRisingEdge(false, status); // Index 0 of digital is always 0. counter->counter->writeConfig_UpSource_Channel(0, status); counter->counter->writeConfig_UpSource_AnalogTrigger(false, status); - counter->counter->writeConfig_Enable(state, status); } /** @@ -738,14 +735,11 @@ void setCounterDownSourceEdge(void* counter_pointer, bool risingEdge, bool falli */ void clearCounterDownSource(void* counter_pointer, int32_t *status) { Counter* counter = (Counter*) counter_pointer; - bool state = counter->counter->readConfig_Enable(status); - counter->counter->writeConfig_Enable(false, status); counter->counter->writeConfig_DownFallingEdge(false, status); counter->counter->writeConfig_DownRisingEdge(false, status); // Index 0 of digital is always 0. counter->counter->writeConfig_DownSource_Channel(0, status); counter->counter->writeConfig_DownSource_AnalogTrigger(false, status); - counter->counter->writeConfig_Enable(state, status); } /** @@ -814,25 +808,6 @@ void setCounterSamplesToAverage(void* counter_pointer, int samplesToAverage, int counter->counter->writeTimerConfig_AverageSize(samplesToAverage, status); } -/** - * Start the Counter counting. - * This enables the counter and it starts accumulating counts from the associated - * input channel. The counter value is not reset on starting, and still has the previous value. - */ -void startCounter(void* counter_pointer, int32_t *status) { - Counter* counter = (Counter*) counter_pointer; - counter->counter->writeConfig_Enable(1, status); -} - -/** - * Stop the Counter. - * Stops the counting but doesn't effect the current value. - */ -void stopCounter(void* counter_pointer, int32_t *status) { - Counter* counter = (Counter*) counter_pointer; - counter->counter->writeConfig_Enable(0, status); -} - /** * Reset the Counter to zero. * Set the counter value to zero. This doesn't effect the running state of the counter, just sets @@ -993,23 +968,6 @@ void freeEncoder(void* encoder_pointer, int32_t *status) { delete encoder->encoder; } -/** - * Start the Encoder. - * Starts counting pulses on the Encoder device. - */ -void startEncoder(void* encoder_pointer, int32_t *status) { - Encoder* encoder = (Encoder*) encoder_pointer; - encoder->encoder->writeConfig_Enable(1, status); -} - -/** - * Stops counting pulses on the Encoder device. The value is not changed. - */ -void stopEncoder(void* encoder_pointer, int32_t *status) { - Encoder* encoder = (Encoder*) encoder_pointer; - encoder->encoder->writeConfig_Enable(0, status); -} - /** * Reset the Encoder distance to zero. * Resets the current count to zero on the encoder. diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/FRC_FPGA_ChipObject_Aliases.h b/hal/lib/Athena/FRC_FPGA_ChipObject/FRC_FPGA_ChipObject_Aliases.h index e177ac2de1..d9fba25c52 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/FRC_FPGA_ChipObject_Aliases.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/FRC_FPGA_ChipObject_Aliases.h @@ -4,7 +4,7 @@ #ifndef __FRC_FPGA_ChipObject_Aliases_h__ #define __FRC_FPGA_ChipObject_Aliases_h__ -#define nInvariantFPGANamespace nFRC_C0EF_1_1_0 #define nRuntimeFPGANamespace nFRC_2012_1_6_4 +#define nInvariantFPGANamespace nFRC_C0EF_1_1_0 #endif // __FRC_FPGA_ChipObject_Aliases_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h b/hal/lib/Athena/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h index f52e4f2c87..f536d2a878 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h @@ -4,6 +4,6 @@ #ifndef __RoboRIO_FRC_ChipObject_Aliases_h__ #define __RoboRIO_FRC_ChipObject_Aliases_h__ -#define nRoboRIO_FPGANamespace nFRC_2015_1_0_8 +#define nRoboRIO_FPGANamespace nFRC_2015_1_0_9 #endif // __RoboRIO_FRC_ChipObject_Aliases_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h b/hal/lib/Athena/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h index 0df6bfbb73..27b06651de 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h @@ -1,2312 +1,2450 @@ -/* - * FPGA Interface C API 2.0 header file. - * - * Copyright (c) 2011, - * National Instruments Corporation. - * All rights reserved. - */ - -#ifndef __NiFpga_h__ -#define __NiFpga_h__ - -/* - * Determine platform details. - */ -#if defined(_M_IX86) \ - || defined(_M_X64) \ - || defined(i386) \ - || defined(__i386__) \ - || defined(__amd64__) \ - || defined(__amd64) \ - || defined(__x86_64__) \ - || defined(__x86_64) \ - || defined(__i386) \ - || defined(_X86_) \ - || defined(__THW_INTEL__) \ - || defined(__I86__) \ - || defined(__INTEL__) \ - || defined(__X86__) \ - || defined(__386__) \ - || defined(__I86__) \ - || defined(M_I386) \ - || defined(M_I86) \ - || defined(_M_I386) \ - || defined(_M_I86) \ - || defined(__arm__) - #if defined(_WIN32) \ - || defined(_WIN64) \ - || defined(__WIN32__) \ - || defined(__TOS_WIN__) \ - || defined(__WINDOWS__) \ - || defined(_WINDOWS) \ - || defined(__WINDOWS_386__) \ - || defined(__CYGWIN__) - /* Either Windows or Phar Lap ETS. */ - #define NiFpga_Windows 1 - #elif defined(__linux) \ - || defined(__linux__) \ - || defined(__gnu_linux__) \ - || defined(linux) - #define NiFpga_Linux 1 - #else - #error Unsupported OS. - #endif -#elif defined(__powerpc) \ - || defined(__powerpc__) \ - || defined(__POWERPC__) \ - || defined(__ppc__) \ - || defined(__PPC) \ - || defined(_M_PPC) \ - || defined(_ARCH_PPC) \ - || defined(__PPC__) \ - || defined(__ppc) - #if defined(__vxworks) - #define NiFpga_VxWorks 1 - #else - #error Unsupported OS. - #endif -#else - #error Unsupported architecture. -#endif - -/* - * Determine compiler. - */ -#if defined(_MSC_VER) - #define NiFpga_Msvc 1 -#elif defined(__GNUC__) - #define NiFpga_Gcc 1 -#elif defined(_CVI_) && !defined(_TPC_) - #define NiFpga_Cvi 1 - /* Enables CVI Library Protection Errors. */ - #pragma EnableLibraryRuntimeChecking -#else - /* Unknown compiler. */ -#endif - -/* - * Determine compliance with different C/C++ language standards. - */ -#if defined(__cplusplus) - #define NiFpga_Cpp 1 - #if __cplusplus >= 199707L - #define NiFpga_Cpp98 1 - #endif -#endif -#if defined(__STDC__) - #define NiFpga_C89 1 - #if defined(__STDC_VERSION__) - #define NiFpga_C90 1 - #if __STDC_VERSION__ >= 199409L - #define NiFpga_C94 1 - #if __STDC_VERSION__ >= 199901L - #define NiFpga_C99 1 - #endif - #endif - #endif -#endif - -/* - * Determine ability to inline functions. - */ -#if NiFpga_Cpp || NiFpga_C99 - /* The inline keyword exists in C++ and C99. */ - #define NiFpga_Inline inline -#elif NiFpga_Msvc - /* Visual C++ (at least since 6.0) also supports an alternate keyword. */ - #define NiFpga_Inline __inline -#elif NiFpga_Gcc - /* GCC (at least since 2.95.2) also supports an alternate keyword. */ - #define NiFpga_Inline __inline__ -#elif !defined(NiFpga_Inline) - /* - * Disable inlining if inline support is unknown. To manually enable - * inlining, #define the following macro before #including NiFpga.h: - * - * #define NiFpga_Inline inline - */ - #define NiFpga_Inline -#endif - -/* - * Define exact-width integer types, if they have not already been defined. - */ -#if NiFpga_ExactWidthIntegerTypesDefined \ - || defined(_STDINT) \ - || defined(_STDINT_H) \ - || defined(_STDINT_H_) \ - || defined(_INTTYPES_H) \ - || defined(_INTTYPES_H_) \ - || defined(_SYS_STDINT_H) \ - || defined(_SYS_STDINT_H_) \ - || defined(_SYS_INTTYPES_H) \ - || defined(_SYS_INTTYPES_H_) \ - || defined(_STDINT_H_INCLUDED) \ - || defined(BOOST_CSTDINT_HPP) \ - || defined(_MSC_STDINT_H_) \ - || defined(_PSTDINT_H_INCLUDED) - /* Assume that exact-width integer types have already been defined. */ -#elif NiFpga_VxWorks - #include -#elif NiFpga_C99 \ - || NiFpga_Gcc /* GCC (at least since 3.0) has a stdint.h. */ \ - || defined(HAVE_STDINT_H) - /* Assume that stdint.h can be included. */ - #include -#elif NiFpga_Msvc \ - || NiFpga_Cvi - /* Manually define exact-width integer types. */ - typedef signed char int8_t; - typedef unsigned char uint8_t; - typedef short int16_t; - typedef unsigned short uint16_t; - typedef int int32_t; - typedef unsigned int uint32_t; - typedef __int64 int64_t; - typedef unsigned __int64 uint64_t; -#else - /* - * Exact-width integer types must be defined by the user, and the following - * macro must be #defined, before #including NiFpga.h: - * - * #define NiFpga_ExactWidthIntegerTypesDefined 1 - */ - #error Exact-width integer types must be defined by the user. See comment. -#endif - -/* Included for definition of size_t. */ -#include - -#if NiFpga_Cpp -extern "C" { -#endif - -/** - * A boolean value; either NiFpga_False or NiFpga_True. - */ -typedef uint8_t NiFpga_Bool; - -/** - * Represents a false condition. - */ -static const NiFpga_Bool NiFpga_False = 0; - -/** - * Represents a true condition. - */ -static const NiFpga_Bool NiFpga_True = 1; - -/** - * Represents the resulting status of a function call through its return value. - * 0 is success, negative values are errors, and positive values are warnings. - */ -typedef int32_t NiFpga_Status; - -/** - * No errors or warnings. - */ -static const NiFpga_Status NiFpga_Status_Success = 0; - -/** - * The timeout expired before the FIFO operation could complete. - */ -static const NiFpga_Status NiFpga_Status_FifoTimeout = -50400; - -/** - * A memory allocation failed. Try again after rebooting. - */ -static const NiFpga_Status NiFpga_Status_MemoryFull = -52000; - -/** - * An unexpected software error occurred. - */ -static const NiFpga_Status NiFpga_Status_SoftwareFault = -52003; - -/** - * A parameter to a function was not valid. This could be a NULL pointer, a bad - * value, etc. - */ -static const NiFpga_Status NiFpga_Status_InvalidParameter = -52005; - -/** - * A required resource was not found. The NiFpga.* library, the RIO resource, - * or some other resource may be missing, or the NiFpga.* library may not be - * the required minimum version. - */ -static const NiFpga_Status NiFpga_Status_ResourceNotFound = -52006; - -/** - * A required resource was not properly initialized. This could occur if - * NiFpga_Initialize was not called or a required NiFpga_IrqContext was not - * reserved. - */ -static const NiFpga_Status NiFpga_Status_ResourceNotInitialized = -52010; - -/** - * The FPGA is already running. - */ -static const NiFpga_Status NiFpga_Status_FpgaAlreadyRunning = -61003; - -/** - * The bitfile was not compiled for the specified resource's device type. - */ -static const NiFpga_Status NiFpga_Status_DeviceTypeMismatch = -61024; - -/** - * An error was detected in the communication between the host computer and the - * FPGA target. - */ -static const NiFpga_Status NiFpga_Status_CommunicationTimeout = -61046; - -/** - * The timeout expired before any of the IRQs were asserted. - */ -static const NiFpga_Status NiFpga_Status_IrqTimeout = -61060; - -/** - * The specified bitfile is invalid or corrupt. - */ -static const NiFpga_Status NiFpga_Status_CorruptBitfile = -61070; - -/** - * The FIFO depth is invalid. It was either 0, greater than the amount of - * available memory in the host computer, or greater than the maximum size - * allowed by the hardware. - */ -static const NiFpga_Status NiFpga_Status_BadDepth = -61072; - -/** - * The number of FIFO elements is invalid. Either the number is greater than - * the depth of the host memory DMA FIFO, or more elements were requested for - * release than had been acquired. - */ -static const NiFpga_Status NiFpga_Status_BadReadWriteCount = -61073; - -/** - * A hardware clocking error occurred. A derived clock lost lock with its base - * clock during the execution of the LabVIEW FPGA VI. If any base clocks with - * derived clocks are referencing an external source, make sure that the - * external source is connected and within the supported frequency, jitter, - * accuracy, duty cycle, and voltage specifications. Also verify that the - * characteristics of the base clock match the configuration specified in the - * FPGA Base Clock Properties. If all base clocks with derived clocks are - * generated from free-running, on-board sources, please contact National - * Instruments technical support at ni.com/support. - */ -static const NiFpga_Status NiFpga_Status_ClockLostLock = -61083; - -/** - * Operation could not be performed because the FPGA is busy. Stop all the - * activities on the FPGA before requesting this operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusy = -61141; - -/** - * Operation could not be performed because the FPGA is busy operating in FPGA - * Interface C API mode. Stop all the activities on the FPGA before requesting - * this operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterfaceCApi = -61200; - -/** - * The chassis is in Scan Interface programming mode. In order to run FPGA VIs, - * you must go to the chassis properties page, select FPGA programming mode, - * and deploy settings. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyScanInterface = -61201; - -/** - * Operation could not be performed because the FPGA is busy operating in FPGA - * Interface mode. Stop all the activities on the FPGA before requesting this - * operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterface = -61202; - -/** - * Operation could not be performed because the FPGA is busy operating in - * Interactive mode. Stop all the activities on the FPGA before requesting this - * operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyInteractive = -61203; - -/** - * Operation could not be performed because the FPGA is busy operating in - * Emulation mode. Stop all the activities on the FPGA before requesting this - * operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyEmulation = -61204; - -/** - * An unexpected internal error occurred. - */ -static const NiFpga_Status NiFpga_Status_InternalError = -61499; - -/** - * Access to the remote system was denied. Use MAX to check the Remote Device - * Access settings under Software>>NI-RIO>>NI-RIO Settings on the remote system. - */ -static const NiFpga_Status NiFpga_Status_AccessDenied = -63033; - -/** - * A connection could not be established to the specified remote device. Ensure - * that the device is on and accessible over the network, that NI-RIO software - * is installed, and that the RIO server is running and properly configured. - */ -static const NiFpga_Status NiFpga_Status_RpcConnectionError = -63040; - -/** - * The RPC session is invalid. The target may have reset or been rebooted. Check - * the network connection and retry the operation. - */ -static const NiFpga_Status NiFpga_Status_RpcSessionError = -63043; - -/** - * A Read FIFO or Write FIFO function was called while the host had acquired - * elements of the FIFO. Release all acquired elements before reading or - * writing. - */ -static const NiFpga_Status NiFpga_Status_FifoElementsCurrentlyAcquired = -63083; - -/** - * The bitfile could not be read. - */ -static const NiFpga_Status NiFpga_Status_BitfileReadError = -63101; - -/** - * The specified signature does not match the signature of the bitfile. If the - * bitfile has been recompiled, regenerate the C API and rebuild the - * application. - */ -static const NiFpga_Status NiFpga_Status_SignatureMismatch = -63106; - -/** - * Either the supplied resource name is invalid as a RIO resource name, or the - * device was not found. Use MAX to find the proper resource name for the - * intended device. - */ -static const NiFpga_Status NiFpga_Status_InvalidResourceName = -63192; - -/** - * The requested feature is not supported. - */ -static const NiFpga_Status NiFpga_Status_FeatureNotSupported = -63193; - -/** - * The NI-RIO software on the remote system is not compatible with the local - * NI-RIO software. Upgrade the NI-RIO software on the remote system. - */ -static const NiFpga_Status NiFpga_Status_VersionMismatch = -63194; - -/** - * The session is invalid or has been closed. - */ -static const NiFpga_Status NiFpga_Status_InvalidSession = -63195; - -/** - * The maximum number of open FPGA sessions has been reached. Close some open - * sessions. - */ -static const NiFpga_Status NiFpga_Status_OutOfHandles = -63198; - -/** - * Tests whether a status is an error. - * - * @param status status to check for an error - * @return whether the status was an error - */ -static NiFpga_Inline NiFpga_Bool NiFpga_IsError(const NiFpga_Status status) -{ - return status < NiFpga_Status_Success; -} - -/** - * Tests whether a status is not an error. Success and warnings are not errors. - * - * @param status status to check for an error - * @return whether the status was a success or warning - */ -static NiFpga_Inline NiFpga_Bool NiFpga_IsNotError(const NiFpga_Status status) -{ - return status >= NiFpga_Status_Success; -} - -/** - * Conditionally sets the status to a new value. The previous status is - * preserved unless the new status is more of an error, which means that - * warnings and errors overwrite successes, and errors overwrite warnings. New - * errors do not overwrite older errors, and new warnings do not overwrite - * older warnings. - * - * @param status status to conditionally set - * @param newStatus new status value that may be set - * @return the resulting status - */ -static NiFpga_Inline NiFpga_Status NiFpga_MergeStatus( - NiFpga_Status* const status, - const NiFpga_Status newStatus) -{ - if (!status) - { - return NiFpga_Status_InvalidParameter; - } - if (NiFpga_IsNotError(*status) - && (*status == NiFpga_Status_Success || NiFpga_IsError(newStatus))) - { - *status = newStatus; - } - return *status; -} - -/** - * This macro evaluates the expression only if the status is not an error. The - * expression must evaluate to an NiFpga_Status, such as a call to any NiFpga_* - * function, because the status will be set to the returned status if the - * expression is evaluated. - * - * You can use this macro to mimic status chaining in LabVIEW, where the status - * does not have to be explicitly checked after each call. Such code may look - * like the following example. - * - * NiFpga_Status status = NiFpga_Status_Success; - * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); - * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); - * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); - * - * @param status status to check for an error - * @param expression expression to call if the incoming status is not an error - */ -#define NiFpga_IfIsNotError(status, expression) \ - if (NiFpga_IsNotError(status)) \ - { \ - NiFpga_MergeStatus(&status, (expression)); \ - } - -/** - * You must call this function before all other function calls. This function - * loads the NiFpga library so that all the other functions will work. If this - * function succeeds, you must call NiFpga_Finalize after all other function - * calls. - * - * @warning This function is not thread safe. - * - * @return result of the call - */ -NiFpga_Status NiFpga_Initialize(void); - -/** - * You must call this function after all other function calls if - * NiFpga_Initialize succeeds. This function unloads the NiFpga library. - * - * @warning This function is not thread safe. - * - * @return result of the call - */ -NiFpga_Status NiFpga_Finalize(void); - -/** - * A handle to an FPGA session. - */ -typedef uint32_t NiFpga_Session; - -/** - * Attributes that NiFpga_Open accepts. - */ -typedef enum -{ - NiFpga_OpenAttribute_NoRun = 1 -} NiFpga_OpenAttribute; - -/** - * Opens a session to the FPGA. This call ensures that the contents of the - * bitfile are programmed to the FPGA. The FPGA runs unless the - * NiFpga_OpenAttribute_NoRun attribute is used. - * - * Because different operating systems have different default current working - * directories for applications, you must pass an absolute path for the bitfile - * parameter. If you pass only the filename instead of an absolute path, the - * operating system may not be able to locate the bitfile. For example, the - * default current working directories are C:\ni-rt\system\ for Phar Lap ETS and - * /c/ for VxWorks. Because the generated *_Bitfile constant is a #define to a - * string literal, you can use C/C++ string-literal concatenation to form an - * absolute path. For example, if the bitfile is in the root directory of a - * Phar Lap ETS system, pass the following for the bitfile parameter. - * - * "C:\\" NiFpga_MyApplication_Bitfile - * - * @param bitfile path to the bitfile - * @param signature signature of the bitfile - * @param resource RIO resource string to open ("RIO0" or "rio://mysystem/RIO") - * @param attribute bitwise OR of any NiFpga_OpenAttributes, or 0 - * @param session outputs the session handle, which must be closed when no - * longer needed - * @return result of the call - */ -NiFpga_Status NiFpga_Open(const char* bitfile, - const char* signature, - const char* resource, - uint32_t attribute, - NiFpga_Session* session); - -/** - * Attributes that NiFpga_Close accepts. - */ -typedef enum -{ - NiFpga_CloseAttribute_NoResetIfLastSession = 1 -} NiFpga_CloseAttribute; - -/** - * Closes the session to the FPGA. The FPGA resets unless either another session - * is still open or you use the NiFpga_CloseAttribute_NoResetIfLastSession - * attribute. - * - * @param session handle to a currently open session - * @param attribute bitwise OR of any NiFpga_CloseAttributes, or 0 - * @return result of the call - */ -NiFpga_Status NiFpga_Close(NiFpga_Session session, - uint32_t attribute); - -/** - * Attributes that NiFpga_Run accepts. - */ -typedef enum -{ - NiFpga_RunAttribute_WaitUntilDone = 1 -} NiFpga_RunAttribute; - -/** - * Runs the FPGA VI on the target. If you use NiFpga_RunAttribute_WaitUntilDone, - * NiFpga_Run blocks the thread until the FPGA finishes running (if ever). - * - * @param session handle to a currently open session - * @param attribute bitwise OR of any NiFpga_RunAttributes, or 0 - * @return result of the call - */ -NiFpga_Status NiFpga_Run(NiFpga_Session session, - uint32_t attribute); - -/** - * Aborts the FPGA VI. - * - * @param session handle to a currently open session - * @return result of the call - */ -NiFpga_Status NiFpga_Abort(NiFpga_Session session); - -/** - * Resets the FPGA VI. - * - * @param session handle to a currently open session - * @return result of the call - */ -NiFpga_Status NiFpga_Reset(NiFpga_Session session); - -/** - * Re-downloads the FPGA bitstream to the target. - * - * @param session handle to a currently open session - * @return result of the call - */ -NiFpga_Status NiFpga_Download(NiFpga_Session session); - -/** - * Reads a boolean value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadBool(NiFpga_Session session, - uint32_t indicator, - NiFpga_Bool* value); - -/** - * Reads a signed 8-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI8(NiFpga_Session session, - uint32_t indicator, - int8_t* value); - -/** - * Reads an unsigned 8-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU8(NiFpga_Session session, - uint32_t indicator, - uint8_t* value); - -/** - * Reads a signed 16-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI16(NiFpga_Session session, - uint32_t indicator, - int16_t* value); - -/** - * Reads an unsigned 16-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU16(NiFpga_Session session, - uint32_t indicator, - uint16_t* value); - -/** - * Reads a signed 32-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI32(NiFpga_Session session, - uint32_t indicator, - int32_t* value); - -/** - * Reads an unsigned 32-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU32(NiFpga_Session session, - uint32_t indicator, - uint32_t* value); - -/** - * Reads a signed 64-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI64(NiFpga_Session session, - uint32_t indicator, - int64_t* value); - -/** - * Reads an unsigned 64-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU64(NiFpga_Session session, - uint32_t indicator, - uint64_t* value); - -/** - * Writes a boolean value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteBool(NiFpga_Session session, - uint32_t control, - NiFpga_Bool value); - -/** - * Writes a signed 8-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI8(NiFpga_Session session, - uint32_t control, - int8_t value); - -/** - * Writes an unsigned 8-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU8(NiFpga_Session session, - uint32_t control, - uint8_t value); - -/** - * Writes a signed 16-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI16(NiFpga_Session session, - uint32_t control, - int16_t value); - -/** - * Writes an unsigned 16-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU16(NiFpga_Session session, - uint32_t control, - uint16_t value); - -/** - * Writes a signed 32-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI32(NiFpga_Session session, - uint32_t control, - int32_t value); - -/** - * Writes an unsigned 32-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU32(NiFpga_Session session, - uint32_t control, - uint32_t value); - -/** - * Writes a signed 64-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI64(NiFpga_Session session, - uint32_t control, - int64_t value); - -/** - * Writes an unsigned 64-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU64(NiFpga_Session session, - uint32_t control, - uint64_t value); - -/** - * Reads an entire array of boolean values from a given array indicator or - * control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayBool(NiFpga_Session session, - uint32_t indicator, - NiFpga_Bool* array, - size_t size); - -/** - * Reads an entire array of signed 8-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI8(NiFpga_Session session, - uint32_t indicator, - int8_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 8-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU8(NiFpga_Session session, - uint32_t indicator, - uint8_t* array, - size_t size); - -/** - * Reads an entire array of signed 16-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI16(NiFpga_Session session, - uint32_t indicator, - int16_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 16-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU16(NiFpga_Session session, - uint32_t indicator, - uint16_t* array, - size_t size); - -/** - * Reads an entire array of signed 32-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI32(NiFpga_Session session, - uint32_t indicator, - int32_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 32-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU32(NiFpga_Session session, - uint32_t indicator, - uint32_t* array, - size_t size); - -/** - * Reads an entire array of signed 64-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI64(NiFpga_Session session, - uint32_t indicator, - int64_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 64-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU64(NiFpga_Session session, - uint32_t indicator, - uint64_t* array, - size_t size); - -/** - * Writes an entire array of boolean values to a given array control or - * indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayBool(NiFpga_Session session, - uint32_t control, - const NiFpga_Bool* array, - size_t size); - -/** - * Writes an entire array of signed 8-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI8(NiFpga_Session session, - uint32_t control, - const int8_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 8-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU8(NiFpga_Session session, - uint32_t control, - const uint8_t* array, - size_t size); - -/** - * Writes an entire array of signed 16-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI16(NiFpga_Session session, - uint32_t control, - const int16_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 16-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU16(NiFpga_Session session, - uint32_t control, - const uint16_t* array, - size_t size); - -/** - * Writes an entire array of signed 32-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI32(NiFpga_Session session, - uint32_t control, - const int32_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 32-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU32(NiFpga_Session session, - uint32_t control, - const uint32_t* array, - size_t size); - -/** - * Writes an entire array of signed 64-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI64(NiFpga_Session session, - uint32_t control, - const int64_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 64-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU64(NiFpga_Session session, - uint32_t control, - const uint64_t* array, - size_t size); - -/** - * Enumeration of all 32 possible IRQs. Multiple IRQs can be bitwise ORed - * together like this: - * - * NiFpga_Irq_3 | NiFpga_Irq_23 - */ -typedef enum -{ - NiFpga_Irq_0 = 1 << 0, - NiFpga_Irq_1 = 1 << 1, - NiFpga_Irq_2 = 1 << 2, - NiFpga_Irq_3 = 1 << 3, - NiFpga_Irq_4 = 1 << 4, - NiFpga_Irq_5 = 1 << 5, - NiFpga_Irq_6 = 1 << 6, - NiFpga_Irq_7 = 1 << 7, - NiFpga_Irq_8 = 1 << 8, - NiFpga_Irq_9 = 1 << 9, - NiFpga_Irq_10 = 1 << 10, - NiFpga_Irq_11 = 1 << 11, - NiFpga_Irq_12 = 1 << 12, - NiFpga_Irq_13 = 1 << 13, - NiFpga_Irq_14 = 1 << 14, - NiFpga_Irq_15 = 1 << 15, - NiFpga_Irq_16 = 1 << 16, - NiFpga_Irq_17 = 1 << 17, - NiFpga_Irq_18 = 1 << 18, - NiFpga_Irq_19 = 1 << 19, - NiFpga_Irq_20 = 1 << 20, - NiFpga_Irq_21 = 1 << 21, - NiFpga_Irq_22 = 1 << 22, - NiFpga_Irq_23 = 1 << 23, - NiFpga_Irq_24 = 1 << 24, - NiFpga_Irq_25 = 1 << 25, - NiFpga_Irq_26 = 1 << 26, - NiFpga_Irq_27 = 1 << 27, - NiFpga_Irq_28 = 1 << 28, - NiFpga_Irq_29 = 1 << 29, - NiFpga_Irq_30 = 1 << 30, - NiFpga_Irq_31 = 1U << 31 -} NiFpga_Irq; - -/** - * Represents an infinite timeout. - */ -static const uint32_t NiFpga_InfiniteTimeout = 0xFFFFFFFF; - -/** - * See NiFpga_ReserveIrqContext for more information. - */ -typedef void* NiFpga_IrqContext; - -/** - * IRQ contexts are single-threaded; only one thread can wait with a particular - * context at any given time. Clients must reserve as many contexts as the - * application requires. - * - * If a context is successfully reserved (the returned status is not an error), - * it must be unreserved later. Otherwise a memory leak will occur. - * - * @param session handle to a currently open session - * @param context outputs the IRQ context - * @return result of the call - */ -NiFpga_Status NiFpga_ReserveIrqContext(NiFpga_Session session, - NiFpga_IrqContext* context); - -/** - * Unreserves an IRQ context obtained from NiFpga_ReserveIrqContext. - * - * @param session handle to a currently open session - * @param context IRQ context to unreserve - * @return result of the call - */ -NiFpga_Status NiFpga_UnreserveIrqContext(NiFpga_Session session, - NiFpga_IrqContext context); - -/** - * This is a blocking function that stops the calling thread until the FPGA - * asserts any IRQ in the irqs parameter, or until the function call times out. - * Before calling this function, you must use NiFpga_ReserveIrqContext to - * reserve an IRQ context. No other threads can use the same context when this - * function is called. - * - * You can use the irqsAsserted parameter to determine which IRQs were asserted - * for each function call. - * - * @param session handle to a currently open session - * @param context IRQ context with which to wait - * @param irqs bitwise OR of NiFpga_Irqs - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param irqsAsserted if non-NULL, outputs bitwise OR of IRQs that were - * asserted - * @param timedOut if non-NULL, outputs whether the timeout expired - * @return result of the call - */ -NiFpga_Status NiFpga_WaitOnIrqs(NiFpga_Session session, - NiFpga_IrqContext context, - uint32_t irqs, - uint32_t timeout, - uint32_t* irqsAsserted, - NiFpga_Bool* timedOut); - -/** - * Acknowledges an IRQ or set of IRQs. - * - * @param session handle to a currently open session - * @param irqs bitwise OR of NiFpga_Irqs - * @return result of the call - */ -NiFpga_Status NiFpga_AcknowledgeIrqs(NiFpga_Session session, - uint32_t irqs); - -/** - * Specifies the depth of the host memory part of the DMA FIFO. This method is - * optional. In order to see the actual depth configured, use - * NiFpga_ConfigureFifo2. - * - * @param session handle to a currently open session - * @param fifo FIFO to configure - * @param depth requested number of elements in the host memory part of the - * DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ConfigureFifo(NiFpga_Session session, - uint32_t fifo, - size_t depth); - -/** - * Specifies the depth of the host memory part of the DMA FIFO. This method is - * optional. - * - * @param session handle to a currently open session - * @param fifo FIFO to configure - * @param requestedDepth requested number of elements in the host memory part - * of the DMA FIFO - * @param actualDepth if non-NULL, outputs the actual number of elements in the - * host memory part of the DMA FIFO, which may be more than - * the requested number - * @return result of the call - */ -NiFpga_Status NiFpga_ConfigureFifo2(NiFpga_Session session, - uint32_t fifo, - size_t requestedDepth, - size_t* actualDepth); -/** - * Starts a FIFO. This method is optional. - * - * @param session handle to a currently open session - * @param fifo FIFO to start - * @return result of the call - */ -NiFpga_Status NiFpga_StartFifo(NiFpga_Session session, - uint32_t fifo); - -/** - * Stops a FIFO. This method is optional. - * - * @param session handle to a currently open session - * @param fifo FIFO to stop - * @return result of the call - */ -NiFpga_Status NiFpga_StopFifo(NiFpga_Session session, - uint32_t fifo); - -/** - * Reads from a target-to-host FIFO of booleans. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoBool(NiFpga_Session session, - uint32_t fifo, - NiFpga_Bool* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI8(NiFpga_Session session, - uint32_t fifo, - int8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU8(NiFpga_Session session, - uint32_t fifo, - uint8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI16(NiFpga_Session session, - uint32_t fifo, - int16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU16(NiFpga_Session session, - uint32_t fifo, - uint16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI32(NiFpga_Session session, - uint32_t fifo, - int32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU32(NiFpga_Session session, - uint32_t fifo, - uint32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI64(NiFpga_Session session, - uint32_t fifo, - int64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU64(NiFpga_Session session, - uint32_t fifo, - uint64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Writes to a host-to-target FIFO of booleans. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoBool(NiFpga_Session session, - uint32_t fifo, - const NiFpga_Bool* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI8(NiFpga_Session session, - uint32_t fifo, - const int8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU8(NiFpga_Session session, - uint32_t fifo, - const uint8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI16(NiFpga_Session session, - uint32_t fifo, - const int16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU16(NiFpga_Session session, - uint32_t fifo, - const uint16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI32(NiFpga_Session session, - uint32_t fifo, - const int32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU32(NiFpga_Session session, - uint32_t fifo, - const uint32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI64(NiFpga_Session session, - uint32_t fifo, - const int64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU64(NiFpga_Session session, - uint32_t fifo, - const uint64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of booleans. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsBool( - NiFpga_Session session, - uint32_t fifo, - NiFpga_Bool** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 8-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI8( - NiFpga_Session session, - uint32_t fifo, - int8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 8-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU8( - NiFpga_Session session, - uint32_t fifo, - uint8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 16-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI16( - NiFpga_Session session, - uint32_t fifo, - int16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 16-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU16( - NiFpga_Session session, - uint32_t fifo, - uint16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 32-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI32( - NiFpga_Session session, - uint32_t fifo, - int32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 32-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU32( - NiFpga_Session session, - uint32_t fifo, - uint32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 64-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI64( - NiFpga_Session session, - uint32_t fifo, - int64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 64-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU64( - NiFpga_Session session, - uint32_t fifo, - uint64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of booleans. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsBool( - NiFpga_Session session, - uint32_t fifo, - NiFpga_Bool** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 8-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI8( - NiFpga_Session session, - uint32_t fifo, - int8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 8-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU8( - NiFpga_Session session, - uint32_t fifo, - uint8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 16-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI16( - NiFpga_Session session, - uint32_t fifo, - int16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 16-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU16( - NiFpga_Session session, - uint32_t fifo, - uint16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 32-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI32( - NiFpga_Session session, - uint32_t fifo, - int32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 32-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU32( - NiFpga_Session session, - uint32_t fifo, - uint32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 64-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI64( - NiFpga_Session session, - uint32_t fifo, - int64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 64-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested reqested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU64( - NiFpga_Session session, - uint32_t fifo, - uint64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Releases previously acquired FIFO elements. - * - * The FPGA target cannot read elements acquired by the host. Therefore, the - * host must release elements after acquiring them. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo FIFO from which to release elements - * @param elements number of elements to release - * @return result of the call - */ -NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session, - uint32_t fifo, - size_t elements); - -/** - * Gets an endpoint reference to a peer-to-peer FIFO. - * - * @param session handle to a currently open session - * @param fifo peer-to-peer FIFO - * @param endpoint outputs the endpoint reference - * @return result of the call - */ -NiFpga_Status NiFpga_GetPeerToPeerFifoEndpoint(NiFpga_Session session, - uint32_t fifo, - uint32_t* endpoint); - -#if NiFpga_Cpp -} -#endif - -#endif +/* + * FPGA Interface C API 14.0 header file. + * + * Copyright (c) 2014, + * National Instruments Corporation. + * All rights reserved. + */ + +#ifndef __NiFpga_h__ +#define __NiFpga_h__ + +/* + * Determine platform details. + */ +#if defined(_M_IX86) \ + || defined(_M_X64) \ + || defined(_M_AMD64) \ + || defined(i386) \ + || defined(__i386) \ + || defined(__i386__) \ + || defined(__i486__) \ + || defined(__i586__) \ + || defined(__i686__) \ + || defined(__amd64__) \ + || defined(__amd64) \ + || defined(__x86_64__) \ + || defined(__x86_64) \ + || defined(__IA32__) \ + || defined(_X86_) \ + || defined(__THW_INTEL__) \ + || defined(__I86__) \ + || defined(__INTEL__) \ + || defined(__X86__) \ + || defined(__386__) \ + || defined(__I86__) \ + || defined(M_I386) \ + || defined(M_I86) \ + || defined(_M_I386) \ + || defined(_M_I86) + #if defined(_WIN32) \ + || defined(_WIN64) \ + || defined(__WIN32__) \ + || defined(__TOS_WIN__) \ + || defined(__WINDOWS__) \ + || defined(_WINDOWS) \ + || defined(__WINDOWS_386__) \ + || defined(__CYGWIN__) + /* Either Windows or Phar Lap ETS. */ + #define NiFpga_Windows 1 + #elif defined(__linux__) \ + || defined(__linux) \ + || defined(linux) \ + || defined(__gnu_linux__) + #define NiFpga_Linux 1 + #elif defined(__APPLE__) && defined(__MACH__) + #define NiFpga_MacOsX 1 + #else + #error Unsupported OS. + #endif +#elif defined(__powerpc) \ + || defined(__powerpc__) \ + || defined(__POWERPC__) \ + || defined(__ppc__) \ + || defined(__PPC) \ + || defined(_M_PPC) \ + || defined(_ARCH_PPC) \ + || defined(__PPC__) \ + || defined(__ppc) + #if defined(__vxworks) + #define NiFpga_VxWorks 1 + #else + #error Unsupported OS. + #endif +#elif defined(__arm__) \ + || defined(__thumb__) \ + || defined(__TARGET_ARCH_ARM) \ + || defined(__TARGET_ARCH_THUMB) \ + || defined(_ARM) \ + || defined(_M_ARM) \ + || defined(_M_ARMT) +#if defined(__linux__) \ + || defined(__linux) \ + || defined(linux) \ + || defined(__gnu_linux__) + #define NiFpga_Linux 1 +#else + #error Unsupported OS. + #endif +#else + #error Unsupported architecture. +#endif + +/* + * Determine compiler. + */ +#if defined(_MSC_VER) + #define NiFpga_Msvc 1 +#elif defined(__GNUC__) + #define NiFpga_Gcc 1 +#elif defined(_CVI_) && !defined(_TPC_) + #define NiFpga_Cvi 1 + /* Enables CVI Library Protection Errors. */ + #pragma EnableLibraryRuntimeChecking +#else + /* Unknown compiler. */ +#endif + +/* + * Determine compliance with different C/C++ language standards. + */ +#if defined(__cplusplus) + #define NiFpga_Cpp 1 + #if __cplusplus >= 199707L + #define NiFpga_Cpp98 1 + #if __cplusplus >= 201103L + #define NiFpga_Cpp11 1 + #endif + #endif +#endif +#if defined(__STDC__) + #define NiFpga_C89 1 + #if defined(__STDC_VERSION__) + #define NiFpga_C90 1 + #if __STDC_VERSION__ >= 199409L + #define NiFpga_C94 1 + #if __STDC_VERSION__ >= 199901L + #define NiFpga_C99 1 + #if __STDC_VERSION__ >= 201112L + #define NiFpga_C11 1 + #endif + #endif + #endif + #endif +#endif + +/* + * Determine ability to inline functions. + */ +#if NiFpga_Cpp || NiFpga_C99 + /* The inline keyword exists in C++ and C99. */ +#define NiFpga_Inline inline +#elif NiFpga_Msvc + /* Visual C++ (at least since 6.0) also supports an alternate keyword. */ + #define NiFpga_Inline __inline +#elif NiFpga_Gcc + /* GCC (at least since 2.95.2) also supports an alternate keyword. */ + #define NiFpga_Inline __inline__ +#elif !defined(NiFpga_Inline) + /* + * Disable inlining if inline support is unknown. To manually enable + * inlining, #define the following macro before #including NiFpga.h: + * + * #define NiFpga_Inline inline + */ + #define NiFpga_Inline +#endif + +/* + * Define exact-width integer types, if they have not already been defined. + */ +#if NiFpga_ExactWidthIntegerTypesDefined \ + || defined(_STDINT) \ + || defined(_STDINT_H) \ + || defined(_STDINT_H_) \ + || defined(_INTTYPES_H) \ + || defined(_INTTYPES_H_) \ + || defined(_SYS_STDINT_H) \ + || defined(_SYS_STDINT_H_) \ + || defined(_SYS_INTTYPES_H) \ + || defined(_SYS_INTTYPES_H_) \ + || defined(_STDINT_H_INCLUDED) \ + || defined(_MSC_STDINT_H_) \ + || defined(_PSTDINT_H_INCLUDED) + /* Assume that exact-width integer types have already been defined. */ +#elif NiFpga_VxWorks + /* VxWorks (at least 6.3 and earlier) did not have stdint.h. */ + #include +#elif NiFpga_C99 \ + || NiFpga_Gcc /* GCC (at least since 3.0) has a stdint.h. */ \ + || defined(HAVE_STDINT_H) + /* Assume that stdint.h can be included. */ + #include +#elif NiFpga_Msvc \ + || NiFpga_Cvi + /* Manually define exact-width integer types. */ + typedef signed char int8_t; + typedef unsigned char uint8_t; + typedef short int16_t; + typedef unsigned short uint16_t; + typedef int int32_t; + typedef unsigned int uint32_t; + typedef __int64 int64_t; + typedef unsigned __int64 uint64_t; +#else + /* + * Exact-width integer types must be defined by the user, and the following + * macro must be #defined, before #including NiFpga.h: + * + * #define NiFpga_ExactWidthIntegerTypesDefined 1 + */ + #error Exact-width integer types must be defined by the user. See comment. +#endif + +/* Included for definition of size_t. */ +#include + +#if NiFpga_Cpp +extern "C" +{ +#endif + +/** + * A boolean value; either NiFpga_False or NiFpga_True. + */ +typedef uint8_t NiFpga_Bool; + +/** + * Represents a false condition. + */ +static const NiFpga_Bool NiFpga_False = 0; + +/** + * Represents a true condition. + */ +static const NiFpga_Bool NiFpga_True = 1; + +/** + * Represents the resulting status of a function call through its return value. + * 0 is success, negative values are errors, and positive values are warnings. + */ +typedef int32_t NiFpga_Status; + +/** + * No errors or warnings. + */ +static const NiFpga_Status NiFpga_Status_Success = 0; + +/** + * The timeout expired before the FIFO operation could complete. + */ +static const NiFpga_Status NiFpga_Status_FifoTimeout = -50400; + +/** + * No transfer is in progress because the transfer was aborted by the client. + * The operation could not be completed as specified. + */ +static const NiFpga_Status NiFpga_Status_TransferAborted = -50405; + +/** + * A memory allocation failed. Try again after rebooting. + */ +static const NiFpga_Status NiFpga_Status_MemoryFull = -52000; + +/** + * An unexpected software error occurred. + */ +static const NiFpga_Status NiFpga_Status_SoftwareFault = -52003; + +/** + * A parameter to a function was not valid. This could be a NULL pointer, a bad + * value, etc. + */ +static const NiFpga_Status NiFpga_Status_InvalidParameter = -52005; + +/** + * A required resource was not found. The NiFpga.* library, the RIO resource, or + * some other resource may be missing. + */ +static const NiFpga_Status NiFpga_Status_ResourceNotFound = -52006; + +/** + * A required resource was not properly initialized. This could occur if + * NiFpga_Initialize was not called or a required NiFpga_IrqContext was not + * reserved. + */ +static const NiFpga_Status NiFpga_Status_ResourceNotInitialized = -52010; + +/** + * A hardware failure has occurred. The operation could not be completed as + * specified. + */ +static const NiFpga_Status NiFpga_Status_HardwareFault = -52018; + +/** + * The FPGA is already running. + */ +static const NiFpga_Status NiFpga_Status_FpgaAlreadyRunning = -61003; + +/** + * An error occurred downloading the VI to the FPGA device. Verify that + * the target is connected and powered and that the resource of the target + * is properly configured. + */ +static const NiFpga_Status NiFpga_Status_DownloadError = -61018; + +/** + * The bitfile was not compiled for the specified resource's device type. + */ +static const NiFpga_Status NiFpga_Status_DeviceTypeMismatch = -61024; + +/** + * An error was detected in the communication between the host computer and the + * FPGA target. + */ +static const NiFpga_Status NiFpga_Status_CommunicationTimeout = -61046; + +/** + * The timeout expired before any of the IRQs were asserted. + */ +static const NiFpga_Status NiFpga_Status_IrqTimeout = -61060; + +/** + * The specified bitfile is invalid or corrupt. + */ +static const NiFpga_Status NiFpga_Status_CorruptBitfile = -61070; + +/** + * The requested FIFO depth is invalid. It is either 0 or an amount not + * supported by the hardware. + */ +static const NiFpga_Status NiFpga_Status_BadDepth = -61072; + +/** + * The number of FIFO elements is invalid. Either the number is greater than the + * depth of the host memory DMA FIFO, or more elements were requested for + * release than had been acquired. + */ +static const NiFpga_Status NiFpga_Status_BadReadWriteCount = -61073; + +/** + * A hardware clocking error occurred. A derived clock lost lock with its base + * clock during the execution of the LabVIEW FPGA VI. If any base clocks with + * derived clocks are referencing an external source, make sure that the + * external source is connected and within the supported frequency, jitter, + * accuracy, duty cycle, and voltage specifications. Also verify that the + * characteristics of the base clock match the configuration specified in the + * FPGA Base Clock Properties. If all base clocks with derived clocks are + * generated from free-running, on-board sources, please contact National + * Instruments technical support at ni.com/support. + */ +static const NiFpga_Status NiFpga_Status_ClockLostLock = -61083; + +/** + * The operation could not be performed because the FPGA is busy. Stop all + * activities on the FPGA before requesting this operation. If the target is in + * Scan Interface programming mode, put it in FPGA Interface programming mode. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusy = -61141; + +/** + * The operation could not be performed because the FPGA is busy operating in + * FPGA Interface C API mode. Stop all activities on the FPGA before requesting + * this operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterfaceCApi = -61200; + +/** + * The chassis is in Scan Interface programming mode. In order to run FPGA VIs, + * you must go to the chassis properties page, select FPGA programming mode, and + * deploy settings. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyScanInterface = -61201; + +/** + * The operation could not be performed because the FPGA is busy operating in + * FPGA Interface mode. Stop all activities on the FPGA before requesting this + * operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterface = -61202; + +/** + * The operation could not be performed because the FPGA is busy operating in + * Interactive mode. Stop all activities on the FPGA before requesting this + * operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyInteractive = -61203; + +/** + * The operation could not be performed because the FPGA is busy operating in + * Emulation mode. Stop all activities on the FPGA before requesting this + * operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyEmulation = -61204; + +/** + * LabVIEW FPGA does not support the Reset method for bitfiles that allow + * removal of implicit enable signals in single-cycle Timed Loops. + */ +static const NiFpga_Status NiFpga_Status_ResetCalledWithImplicitEnableRemoval = -61211; + +/** + * LabVIEW FPGA does not support the Abort method for bitfiles that allow + * removal of implicit enable signals in single-cycle Timed Loops. + */ +static const NiFpga_Status NiFpga_Status_AbortCalledWithImplicitEnableRemoval = -61212; + +/** + * LabVIEW FPGA does not support Close and Reset if Last Reference for bitfiles + * that allow removal of implicit enable signals in single-cycle Timed Loops. + * Pass the NiFpga_CloseAttribute_NoResetIfLastSession attribute to NiFpga_Close + * instead of 0. + */ +static const NiFpga_Status NiFpga_Status_CloseAndResetCalledWithImplicitEnableRemoval = -61213; + +/** + * For bitfiles that allow removal of implicit enable signals in single-cycle + * Timed Loops, LabVIEW FPGA does not support this method prior to running the + * bitfile. + */ +static const NiFpga_Status NiFpga_Status_ImplicitEnableRemovalButNotYetRun = -61214; + +/** + * Bitfiles that allow removal of implicit enable signals in single-cycle Timed + * Loops can run only once. Download the bitfile again before re-running the VI. + */ +static const NiFpga_Status NiFpga_Status_RunAfterStoppedCalledWithImplicitEnableRemoval = -61215; + +/** + * A gated clock has violated the handshaking protocol. If you are using + * external gated clocks, ensure that they follow the required clock gating + * protocol. If you are generating your clocks internally, please contact + * National Instruments Technical Support. + */ +static const NiFpga_Status NiFpga_Status_GatedClockHandshakingViolation = -61216; + +/** + * The number of elements requested must be less than or equal to the number of + * unacquired elements left in the host memory DMA FIFO. There are currently + * fewer unacquired elements left in the FIFO than are being requested. Release + * some acquired elements before acquiring more elements. + */ +static const NiFpga_Status NiFpga_Status_ElementsNotPermissibleToBeAcquired = -61219; + +/** + * An unexpected internal error occurred. + */ +static const NiFpga_Status NiFpga_Status_InternalError = -61499; + +/** + * The NI-RIO driver was unable to allocate memory for a FIFO. This can happen + * when the combined depth of all DMA FIFOs exceeds the maximum depth for the + * controller, or when the controller runs out of system memory. You may be able + * to reconfigure the controller with a greater maximum FIFO depth. For more + * information, refer to the NI KnowledgeBase article 65OF2ERQ. + */ +static const NiFpga_Status NiFpga_Status_TotalDmaFifoDepthExceeded = -63003; + +/** + * Access to the remote system was denied. Use MAX to check the Remote Device + * Access settings under Software>>NI-RIO>>NI-RIO Settings on the remote system. + */ +static const NiFpga_Status NiFpga_Status_AccessDenied = -63033; + +/** + * The NI-RIO software on the host is not compatible with the software on the + * target. Upgrade the NI-RIO software on the host in order to connect to this + * target. + */ +static const NiFpga_Status NiFpga_Status_HostVersionMismatch = -63038; + +/** + * A connection could not be established to the specified remote device. Ensure + * that the device is on and accessible over the network, that NI-RIO software + * is installed, and that the RIO server is running and properly configured. + */ +static const NiFpga_Status NiFpga_Status_RpcConnectionError = -63040; + +/** + * The RPC session is invalid. The target may have reset or been rebooted. Check + * the network connection and retry the operation. + */ +static const NiFpga_Status NiFpga_Status_RpcSessionError = -63043; + +/** + * The operation could not complete because another session is accessing the + * FIFO. Close the other session and retry. + */ +static const NiFpga_Status NiFpga_Status_FifoReserved = -63082; + +/** + * A Configure FIFO, Stop FIFO, Read FIFO, or Write FIFO function was called + * while the host had acquired elements of the FIFO. Release all acquired + * elements before configuring, stopping, reading, or writing. + */ +static const NiFpga_Status NiFpga_Status_FifoElementsCurrentlyAcquired = -63083; + +/** + * A function was called using a misaligned address. The address must be a + * multiple of the size of the datatype. + */ +static const NiFpga_Status NiFpga_Status_MisalignedAccess = -63084; + +/** + * The FPGA Read/Write Control Function is accessing a control or indicator + * with data that exceeds the maximum size supported on the current target. + * Refer to the hardware documentation for the limitations on data types for + * this target. + */ +static const NiFpga_Status NiFpga_Status_ControlOrIndicatorTooLarge = -63085; + +/** + * A valid .lvbitx bitfile is required. If you are using a valid .lvbitx + * bitfile, the bitfile may not be compatible with the software you are using. + * Determine which version of LabVIEW was used to make the bitfile, update your + * software to that version or later, and try again. + */ +static const NiFpga_Status NiFpga_Status_BitfileReadError = -63101; + +/** + * The specified signature does not match the signature of the bitfile. If the + * bitfile has been recompiled, regenerate the C API and rebuild the + * application. + */ +static const NiFpga_Status NiFpga_Status_SignatureMismatch = -63106; + +/** + * The bitfile you are trying to use is not compatible with the version of + * NI-RIO installed on the target and/or the host. Determine which versions of + * NI-RIO and LabVIEW were used to make the bitfile, update the software on the + * target and host to that version or later, and try again. + */ +static const NiFpga_Status NiFpga_Status_IncompatibleBitfile = -63107; + +/** + * Either the supplied resource name is invalid as a RIO resource name, or the + * device was not found. Use MAX to find the proper resource name for the + * intended device. + */ +static const NiFpga_Status NiFpga_Status_InvalidResourceName = -63192; + +/** + * The requested feature is not supported. + */ +static const NiFpga_Status NiFpga_Status_FeatureNotSupported = -63193; + +/** + * The NI-RIO software on the target system is not compatible with this + * software. Upgrade the NI-RIO software on the target system. + */ +static const NiFpga_Status NiFpga_Status_VersionMismatch = -63194; + +/** + * The session is invalid or has been closed. + */ +static const NiFpga_Status NiFpga_Status_InvalidSession = -63195; + +/** + * The maximum number of open FPGA sessions has been reached. Close some open + * sessions. + */ +static const NiFpga_Status NiFpga_Status_OutOfHandles = -63198; + +/** + * Tests whether a status is an error. + * + * @param status status to check for an error + * @return whether the status was an error + */ +static NiFpga_Inline NiFpga_Bool NiFpga_IsError(const NiFpga_Status status) +{ + return status < NiFpga_Status_Success; +} + +/** + * Tests whether a status is not an error. Success and warnings are not errors. + * + * @param status status to check for an error + * @return whether the status was a success or warning + */ +static NiFpga_Inline NiFpga_Bool NiFpga_IsNotError(const NiFpga_Status status) +{ + return status >= NiFpga_Status_Success; +} + +/** + * Conditionally sets the status to a new value. The previous status is + * preserved unless the new status is more of an error, which means that + * warnings and errors overwrite successes, and errors overwrite warnings. New + * errors do not overwrite older errors, and new warnings do not overwrite + * older warnings. + * + * @param status status to conditionally set + * @param newStatus new status value that may be set + * @return the resulting status + */ +static NiFpga_Inline NiFpga_Status NiFpga_MergeStatus( + NiFpga_Status* const status, + const NiFpga_Status newStatus) +{ + if (!status) + return NiFpga_Status_InvalidParameter; + if (NiFpga_IsNotError(*status) + && (*status == NiFpga_Status_Success || NiFpga_IsError(newStatus))) + *status = newStatus; + return *status; +} + +/** + * This macro evaluates the expression only if the status is not an error. The + * expression must evaluate to an NiFpga_Status, such as a call to any NiFpga_* + * function, because the status will be set to the returned status if the + * expression is evaluated. + * + * You can use this macro to mimic status chaining in LabVIEW, where the status + * does not have to be explicitly checked after each call. Such code may look + * like the following example. + * + * NiFpga_Status status = NiFpga_Status_Success; + * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); + * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); + * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); + * + * @param status status to check for an error + * @param expression expression to call if the incoming status is not an error + */ +#define NiFpga_IfIsNotError(status, expression) \ + if (NiFpga_IsNotError(status)) \ + NiFpga_MergeStatus(&status, (expression)); \ + +/** + * You must call this function before all other function calls. This function + * loads the NiFpga library so that all the other functions will work. If this + * function succeeds, you must call NiFpga_Finalize after all other function + * calls. + * + * @warning This function is not thread safe. + * + * @return result of the call + */ +NiFpga_Status NiFpga_Initialize(void); + +/** + * You must call this function after all other function calls if + * NiFpga_Initialize succeeds. This function unloads the NiFpga library. + * + * @warning This function is not thread safe. + * + * @return result of the call + */ +NiFpga_Status NiFpga_Finalize(void); + +/** + * A handle to an FPGA session. + */ +typedef uint32_t NiFpga_Session; + +/** + * Attributes that NiFpga_Open accepts. + */ +typedef enum +{ + NiFpga_OpenAttribute_NoRun = 1 +} NiFpga_OpenAttribute; + +/** + * Opens a session to the FPGA. This call ensures that the contents of the + * bitfile are programmed to the FPGA. The FPGA runs unless the + * NiFpga_OpenAttribute_NoRun attribute is used. + * + * Because different operating systems have different default current working + * directories for applications, you must pass an absolute path for the bitfile + * parameter. If you pass only the filename instead of an absolute path, the + * operating system may not be able to locate the bitfile. For example, the + * default current working directories are C:\ni-rt\system\ for Phar Lap ETS and + * /c/ for VxWorks. Because the generated *_Bitfile constant is a #define to a + * string literal, you can use C/C++ string-literal concatenation to form an + * absolute path. For example, if the bitfile is in the root directory of a + * Phar Lap ETS system, pass the following for the bitfile parameter. + * + * "C:\\" NiFpga_MyApplication_Bitfile + * + * @param bitfile path to the bitfile + * @param signature signature of the bitfile + * @param resource RIO resource string to open ("RIO0" or "rio://mysystem/RIO") + * @param attribute bitwise OR of any NiFpga_OpenAttributes, or 0 + * @param session outputs the session handle, which must be closed when no + * longer needed + * @return result of the call + */ +NiFpga_Status NiFpga_Open(const char* bitfile, + const char* signature, + const char* resource, + uint32_t attribute, + NiFpga_Session* session); + +/** + * Attributes that NiFpga_Close accepts. + */ +typedef enum +{ + NiFpga_CloseAttribute_NoResetIfLastSession = 1 +} NiFpga_CloseAttribute; + +/** + * Closes the session to the FPGA. The FPGA resets unless either another session + * is still open or you use the NiFpga_CloseAttribute_NoResetIfLastSession + * attribute. + * + * @param session handle to a currently open session + * @param attribute bitwise OR of any NiFpga_CloseAttributes, or 0 + * @return result of the call + */ +NiFpga_Status NiFpga_Close(NiFpga_Session session, + uint32_t attribute); + +/** + * Attributes that NiFpga_Run accepts. + */ +typedef enum +{ + NiFpga_RunAttribute_WaitUntilDone = 1 +} NiFpga_RunAttribute; + +/** + * Runs the FPGA VI on the target. If you use NiFpga_RunAttribute_WaitUntilDone, + * NiFpga_Run blocks the thread until the FPGA finishes running. + * + * @param session handle to a currently open session + * @param attribute bitwise OR of any NiFpga_RunAttributes, or 0 + * @return result of the call + */ +NiFpga_Status NiFpga_Run(NiFpga_Session session, + uint32_t attribute); + +/** + * Aborts the FPGA VI. + * + * @param session handle to a currently open session + * @return result of the call + */ +NiFpga_Status NiFpga_Abort(NiFpga_Session session); + +/** + * Resets the FPGA VI. + * + * @param session handle to a currently open session + * @return result of the call + */ +NiFpga_Status NiFpga_Reset(NiFpga_Session session); + +/** + * Re-downloads the FPGA bitstream to the target. + * + * @param session handle to a currently open session + * @return result of the call + */ +NiFpga_Status NiFpga_Download(NiFpga_Session session); + +/** + * Reads a boolean value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadBool(NiFpga_Session session, + uint32_t indicator, + NiFpga_Bool* value); + +/** + * Reads a signed 8-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI8(NiFpga_Session session, + uint32_t indicator, + int8_t* value); + +/** + * Reads an unsigned 8-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU8(NiFpga_Session session, + uint32_t indicator, + uint8_t* value); + +/** + * Reads a signed 16-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI16(NiFpga_Session session, + uint32_t indicator, + int16_t* value); + +/** + * Reads an unsigned 16-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU16(NiFpga_Session session, + uint32_t indicator, + uint16_t* value); + +/** + * Reads a signed 32-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI32(NiFpga_Session session, + uint32_t indicator, + int32_t* value); + +/** + * Reads an unsigned 32-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU32(NiFpga_Session session, + uint32_t indicator, + uint32_t* value); + +/** + * Reads a signed 64-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI64(NiFpga_Session session, + uint32_t indicator, + int64_t* value); + +/** + * Reads an unsigned 64-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU64(NiFpga_Session session, + uint32_t indicator, + uint64_t* value); + +/** + * Writes a boolean value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteBool(NiFpga_Session session, + uint32_t control, + NiFpga_Bool value); + +/** + * Writes a signed 8-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI8(NiFpga_Session session, + uint32_t control, + int8_t value); + +/** + * Writes an unsigned 8-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU8(NiFpga_Session session, + uint32_t control, + uint8_t value); + +/** + * Writes a signed 16-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI16(NiFpga_Session session, + uint32_t control, + int16_t value); + +/** + * Writes an unsigned 16-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU16(NiFpga_Session session, + uint32_t control, + uint16_t value); + +/** + * Writes a signed 32-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI32(NiFpga_Session session, + uint32_t control, + int32_t value); + +/** + * Writes an unsigned 32-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU32(NiFpga_Session session, + uint32_t control, + uint32_t value); + +/** + * Writes a signed 64-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI64(NiFpga_Session session, + uint32_t control, + int64_t value); + +/** + * Writes an unsigned 64-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU64(NiFpga_Session session, + uint32_t control, + uint64_t value); + +/** + * Reads an entire array of boolean values from a given array indicator or + * control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayBool(NiFpga_Session session, + uint32_t indicator, + NiFpga_Bool* array, + size_t size); + +/** + * Reads an entire array of signed 8-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI8(NiFpga_Session session, + uint32_t indicator, + int8_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 8-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU8(NiFpga_Session session, + uint32_t indicator, + uint8_t* array, + size_t size); + +/** + * Reads an entire array of signed 16-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI16(NiFpga_Session session, + uint32_t indicator, + int16_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 16-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU16(NiFpga_Session session, + uint32_t indicator, + uint16_t* array, + size_t size); + +/** + * Reads an entire array of signed 32-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI32(NiFpga_Session session, + uint32_t indicator, + int32_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 32-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU32(NiFpga_Session session, + uint32_t indicator, + uint32_t* array, + size_t size); + +/** + * Reads an entire array of signed 64-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI64(NiFpga_Session session, + uint32_t indicator, + int64_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 64-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU64(NiFpga_Session session, + uint32_t indicator, + uint64_t* array, + size_t size); + +/** + * Writes an entire array of boolean values to a given array control or + * indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayBool(NiFpga_Session session, + uint32_t control, + const NiFpga_Bool* array, + size_t size); + +/** + * Writes an entire array of signed 8-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI8(NiFpga_Session session, + uint32_t control, + const int8_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 8-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU8(NiFpga_Session session, + uint32_t control, + const uint8_t* array, + size_t size); + +/** + * Writes an entire array of signed 16-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI16(NiFpga_Session session, + uint32_t control, + const int16_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 16-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU16(NiFpga_Session session, + uint32_t control, + const uint16_t* array, + size_t size); + +/** + * Writes an entire array of signed 32-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI32(NiFpga_Session session, + uint32_t control, + const int32_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 32-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU32(NiFpga_Session session, + uint32_t control, + const uint32_t* array, + size_t size); + +/** + * Writes an entire array of signed 64-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI64(NiFpga_Session session, + uint32_t control, + const int64_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 64-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU64(NiFpga_Session session, + uint32_t control, + const uint64_t* array, + size_t size); + +/** + * Enumeration of all 32 possible IRQs. Multiple IRQs can be bitwise ORed + * together like this: + * + * NiFpga_Irq_3 | NiFpga_Irq_23 + */ +typedef enum +{ + NiFpga_Irq_0 = 1 << 0, + NiFpga_Irq_1 = 1 << 1, + NiFpga_Irq_2 = 1 << 2, + NiFpga_Irq_3 = 1 << 3, + NiFpga_Irq_4 = 1 << 4, + NiFpga_Irq_5 = 1 << 5, + NiFpga_Irq_6 = 1 << 6, + NiFpga_Irq_7 = 1 << 7, + NiFpga_Irq_8 = 1 << 8, + NiFpga_Irq_9 = 1 << 9, + NiFpga_Irq_10 = 1 << 10, + NiFpga_Irq_11 = 1 << 11, + NiFpga_Irq_12 = 1 << 12, + NiFpga_Irq_13 = 1 << 13, + NiFpga_Irq_14 = 1 << 14, + NiFpga_Irq_15 = 1 << 15, + NiFpga_Irq_16 = 1 << 16, + NiFpga_Irq_17 = 1 << 17, + NiFpga_Irq_18 = 1 << 18, + NiFpga_Irq_19 = 1 << 19, + NiFpga_Irq_20 = 1 << 20, + NiFpga_Irq_21 = 1 << 21, + NiFpga_Irq_22 = 1 << 22, + NiFpga_Irq_23 = 1 << 23, + NiFpga_Irq_24 = 1 << 24, + NiFpga_Irq_25 = 1 << 25, + NiFpga_Irq_26 = 1 << 26, + NiFpga_Irq_27 = 1 << 27, + NiFpga_Irq_28 = 1 << 28, + NiFpga_Irq_29 = 1 << 29, + NiFpga_Irq_30 = 1 << 30, + NiFpga_Irq_31 = 1U << 31 +} NiFpga_Irq; + +/** + * Represents an infinite timeout. + */ +static const uint32_t NiFpga_InfiniteTimeout = 0xFFFFFFFF; + +/** + * See NiFpga_ReserveIrqContext for more information. + */ +typedef void* NiFpga_IrqContext; + +/** + * IRQ contexts are single-threaded; only one thread can wait with a + * particular context at any given time. To minimize jitter when first + * waiting on IRQs, reserve as many contexts as the application + * requires. + * + * If a context is successfully reserved (the returned status is not an error), + * it must be unreserved later. Otherwise a memory leak will occur. + * + * @param session handle to a currently open session + * @param context outputs the IRQ context + * @return result of the call + */ +NiFpga_Status NiFpga_ReserveIrqContext(NiFpga_Session session, + NiFpga_IrqContext* context); + +/** + * Unreserves an IRQ context obtained from NiFpga_ReserveIrqContext. + * + * @param session handle to a currently open session + * @param context IRQ context to unreserve + * @return result of the call + */ +NiFpga_Status NiFpga_UnreserveIrqContext(NiFpga_Session session, + NiFpga_IrqContext context); + +/** + * This is a blocking function that stops the calling thread until the + * FPGA asserts any IRQ in the irqs parameter, or until the function + * call times out. Before calling this function, use + * NiFpga_ReserveIrqContext to reserve an IRQ context. No other + * threads can use the same context when this function is called. + * + * You can use the irqsAsserted parameter to determine which IRQs were asserted + * for each function call. + * + * @param session handle to a currently open session + * @param context IRQ context with which to wait + * @param irqs bitwise OR of NiFpga_Irqs + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param irqsAsserted if non-NULL, outputs bitwise OR of IRQs that were + * asserted + * @param timedOut if non-NULL, outputs whether the timeout expired + * @return result of the call + */ +NiFpga_Status NiFpga_WaitOnIrqs(NiFpga_Session session, + NiFpga_IrqContext context, + uint32_t irqs, + uint32_t timeout, + uint32_t* irqsAsserted, + NiFpga_Bool* timedOut); + +/** + * Acknowledges an IRQ or set of IRQs. + * + * @param session handle to a currently open session + * @param irqs bitwise OR of NiFpga_Irqs + * @return result of the call + */ +NiFpga_Status NiFpga_AcknowledgeIrqs(NiFpga_Session session, + uint32_t irqs); + +/** + * Specifies the depth of the host memory part of the DMA FIFO. This method is + * optional. In order to see the actual depth configured, use + * NiFpga_ConfigureFifo2. + * + * @param session handle to a currently open session + * @param fifo FIFO to configure + * @param depth requested number of elements in the host memory part of the + * DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ConfigureFifo(NiFpga_Session session, + uint32_t fifo, + size_t depth); + +/** + * Specifies the depth of the host memory part of the DMA FIFO. This method is + * optional. + * + * @param session handle to a currently open session + * @param fifo FIFO to configure + * @param requestedDepth requested number of elements in the host memory part + * of the DMA FIFO + * @param actualDepth if non-NULL, outputs the actual number of elements in the + * host memory part of the DMA FIFO, which may be more than + * the requested number + * @return result of the call + */ +NiFpga_Status NiFpga_ConfigureFifo2(NiFpga_Session session, + uint32_t fifo, + size_t requestedDepth, + size_t* actualDepth); + +/** + * Starts a FIFO. This method is optional. + * + * @param session handle to a currently open session + * @param fifo FIFO to start + * @return result of the call + */ +NiFpga_Status NiFpga_StartFifo(NiFpga_Session session, + uint32_t fifo); + +/** + * Stops a FIFO. This method is optional. + * + * @param session handle to a currently open session + * @param fifo FIFO to stop + * @return result of the call + */ +NiFpga_Status NiFpga_StopFifo(NiFpga_Session session, + uint32_t fifo); + +/** + * Reads from a target-to-host FIFO of booleans. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoBool(NiFpga_Session session, + uint32_t fifo, + NiFpga_Bool* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI8(NiFpga_Session session, + uint32_t fifo, + int8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU8(NiFpga_Session session, + uint32_t fifo, + uint8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI16(NiFpga_Session session, + uint32_t fifo, + int16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU16(NiFpga_Session session, + uint32_t fifo, + uint16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI32(NiFpga_Session session, + uint32_t fifo, + int32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU32(NiFpga_Session session, + uint32_t fifo, + uint32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI64(NiFpga_Session session, + uint32_t fifo, + int64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU64(NiFpga_Session session, + uint32_t fifo, + uint64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Writes to a host-to-target FIFO of booleans. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoBool(NiFpga_Session session, + uint32_t fifo, + const NiFpga_Bool* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI8(NiFpga_Session session, + uint32_t fifo, + const int8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU8(NiFpga_Session session, + uint32_t fifo, + const uint8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI16(NiFpga_Session session, + uint32_t fifo, + const int16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU16(NiFpga_Session session, + uint32_t fifo, + const uint16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI32(NiFpga_Session session, + uint32_t fifo, + const int32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU32(NiFpga_Session session, + uint32_t fifo, + const uint32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI64(NiFpga_Session session, + uint32_t fifo, + const int64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU64(NiFpga_Session session, + uint32_t fifo, + const uint64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of booleans. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsBool( + NiFpga_Session session, + uint32_t fifo, + NiFpga_Bool** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 8-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI8( + NiFpga_Session session, + uint32_t fifo, + int8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 8-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU8( + NiFpga_Session session, + uint32_t fifo, + uint8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 16-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI16( + NiFpga_Session session, + uint32_t fifo, + int16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 16-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU16( + NiFpga_Session session, + uint32_t fifo, + uint16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 32-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI32( + NiFpga_Session session, + uint32_t fifo, + int32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 32-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU32( + NiFpga_Session session, + uint32_t fifo, + uint32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 64-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI64( + NiFpga_Session session, + uint32_t fifo, + int64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 64-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU64( + NiFpga_Session session, + uint32_t fifo, + uint64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of booleans. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsBool( + NiFpga_Session session, + uint32_t fifo, + NiFpga_Bool** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 8-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI8( + NiFpga_Session session, + uint32_t fifo, + int8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 8-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU8( + NiFpga_Session session, + uint32_t fifo, + uint8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 16-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI16( + NiFpga_Session session, + uint32_t fifo, + int16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 16-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU16( + NiFpga_Session session, + uint32_t fifo, + uint16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 32-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI32( + NiFpga_Session session, + uint32_t fifo, + int32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 32-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU32( + NiFpga_Session session, + uint32_t fifo, + uint32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 64-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI64( + NiFpga_Session session, + uint32_t fifo, + int64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 64-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU64( + NiFpga_Session session, + uint32_t fifo, + uint64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Releases previously acquired FIFO elements. + * + * The FPGA target cannot read elements acquired by the host. Therefore, the + * host must release elements after acquiring them. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo FIFO from which to release elements + * @param elements number of elements to release + * @return result of the call + */ +NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session, + uint32_t fifo, + size_t elements); + +/** + * Gets an endpoint reference to a peer-to-peer FIFO. + * + * @param session handle to a currently open session + * @param fifo peer-to-peer FIFO + * @param endpoint outputs the endpoint reference + * @return result of the call + */ +NiFpga_Status NiFpga_GetPeerToPeerFifoEndpoint(NiFpga_Session session, + uint32_t fifo, + uint32_t* endpoint); + +#if NiFpga_Cpp +} +#endif + +#endif diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h index 51eeb57659..71272aaba4 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h @@ -1,15 +1,15 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_nInterfaceGlobals_h__ -#define __nFRC_2015_1_0_8_nInterfaceGlobals_h__ +#ifndef __nFRC_2015_1_0_9_nInterfaceGlobals_h__ +#define __nFRC_2015_1_0_9_nInterfaceGlobals_h__ namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { extern unsigned int g_currentTargetClass; } } -#endif // __nFRC_2015_1_0_8_nInterfaceGlobals_h__ +#endif // __nFRC_2015_1_0_9_nInterfaceGlobals_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h index d20d565ec6..039155f972 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_AI_h__ -#define __nFRC_2015_1_0_8_AI_h__ +#ifndef __nFRC_2015_1_0_9_AI_h__ +#define __nFRC_2015_1_0_9_AI_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tAI @@ -140,4 +140,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_AI_h__ +#endif // __nFRC_2015_1_0_9_AI_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h index 2b0db858e3..674f38c992 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_AO_h__ -#define __nFRC_2015_1_0_8_AO_h__ +#ifndef __nFRC_2015_1_0_9_AO_h__ +#define __nFRC_2015_1_0_9_AO_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tAO @@ -47,4 +47,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_AO_h__ +#endif // __nFRC_2015_1_0_9_AO_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h index dd4abd21ef..e7fe83bfd0 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Accel_h__ -#define __nFRC_2015_1_0_8_Accel_h__ +#ifndef __nFRC_2015_1_0_9_Accel_h__ +#define __nFRC_2015_1_0_9_Accel_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tAccel @@ -99,4 +99,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Accel_h__ +#endif // __nFRC_2015_1_0_9_Accel_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h index cf533a502e..a6d9dc8463 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Accumulator_h__ -#define __nFRC_2015_1_0_8_Accumulator_h__ +#ifndef __nFRC_2015_1_0_9_Accumulator_h__ +#define __nFRC_2015_1_0_9_Accumulator_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tAccumulator @@ -84,4 +84,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Accumulator_h__ +#endif // __nFRC_2015_1_0_9_Accumulator_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h index d88b3ef3ad..8fb2024f2e 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Alarm_h__ -#define __nFRC_2015_1_0_8_Alarm_h__ +#ifndef __nFRC_2015_1_0_9_Alarm_h__ +#define __nFRC_2015_1_0_9_Alarm_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tAlarm @@ -54,4 +54,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Alarm_h__ +#endif // __nFRC_2015_1_0_9_Alarm_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h index c57b397da9..c99b7dbd10 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_AnalogTrigger_h__ -#define __nFRC_2015_1_0_8_AnalogTrigger_h__ +#ifndef __nFRC_2015_1_0_9_AnalogTrigger_h__ +#define __nFRC_2015_1_0_9_AnalogTrigger_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tAnalogTrigger @@ -126,4 +126,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_AnalogTrigger_h__ +#endif // __nFRC_2015_1_0_9_AnalogTrigger_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h index 89f5894e82..a3e5465e70 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_BIST_h__ -#define __nFRC_2015_1_0_8_BIST_h__ +#ifndef __nFRC_2015_1_0_9_BIST_h__ +#define __nFRC_2015_1_0_9_BIST_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tBIST @@ -87,4 +87,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_BIST_h__ +#endif // __nFRC_2015_1_0_9_BIST_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h index a949c30eb1..a0d6be7338 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Counter_h__ -#define __nFRC_2015_1_0_8_Counter_h__ +#ifndef __nFRC_2015_1_0_9_Counter_h__ +#define __nFRC_2015_1_0_9_Counter_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tCounter @@ -56,21 +56,21 @@ public: unsigned IndexSource_Module : 1; unsigned IndexSource_AnalogTrigger : 1; unsigned IndexActiveHigh : 1; + unsigned IndexEdgeSensitive : 1; unsigned UpRisingEdge : 1; unsigned UpFallingEdge : 1; unsigned DownRisingEdge : 1; unsigned DownFallingEdge : 1; unsigned Mode : 2; unsigned PulseLengthThreshold : 6; - unsigned Enable : 1; #else - unsigned Enable : 1; unsigned PulseLengthThreshold : 6; unsigned Mode : 2; unsigned DownFallingEdge : 1; unsigned DownRisingEdge : 1; unsigned UpFallingEdge : 1; unsigned UpRisingEdge : 1; + unsigned IndexEdgeSensitive : 1; unsigned IndexActiveHigh : 1; unsigned IndexSource_AnalogTrigger : 1; unsigned IndexSource_Module : 1; @@ -147,13 +147,13 @@ public: virtual void writeConfig_IndexSource_Module(unsigned char value, tRioStatusCode *status) = 0; virtual void writeConfig_IndexSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_IndexActiveHigh(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexEdgeSensitive(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_UpRisingEdge(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_UpFallingEdge(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_DownRisingEdge(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_DownFallingEdge(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_Mode(unsigned char value, tRioStatusCode *status) = 0; virtual void writeConfig_PulseLengthThreshold(unsigned short value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable(bool value, tRioStatusCode *status) = 0; virtual tConfig readConfig(tRioStatusCode *status) = 0; virtual unsigned char readConfig_UpSource_Channel(tRioStatusCode *status) = 0; virtual unsigned char readConfig_UpSource_Module(tRioStatusCode *status) = 0; @@ -165,13 +165,13 @@ public: virtual unsigned char readConfig_IndexSource_Module(tRioStatusCode *status) = 0; virtual bool readConfig_IndexSource_AnalogTrigger(tRioStatusCode *status) = 0; virtual bool readConfig_IndexActiveHigh(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexEdgeSensitive(tRioStatusCode *status) = 0; virtual bool readConfig_UpRisingEdge(tRioStatusCode *status) = 0; virtual bool readConfig_UpFallingEdge(tRioStatusCode *status) = 0; virtual bool readConfig_DownRisingEdge(tRioStatusCode *status) = 0; virtual bool readConfig_DownFallingEdge(tRioStatusCode *status) = 0; virtual unsigned char readConfig_Mode(tRioStatusCode *status) = 0; virtual unsigned short readConfig_PulseLengthThreshold(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable(tRioStatusCode *status) = 0; typedef enum @@ -216,4 +216,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Counter_h__ +#endif // __nFRC_2015_1_0_9_Counter_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h index 092232f1c9..21e420dcf6 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_DIO_h__ -#define __nFRC_2015_1_0_8_DIO_h__ +#ifndef __nFRC_2015_1_0_9_DIO_h__ +#define __nFRC_2015_1_0_9_DIO_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tDIO @@ -245,4 +245,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_DIO_h__ +#endif // __nFRC_2015_1_0_9_DIO_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h index 284720d040..81d3ce0f31 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_DMA_h__ -#define __nFRC_2015_1_0_8_DMA_h__ +#ifndef __nFRC_2015_1_0_9_DMA_h__ +#define __nFRC_2015_1_0_9_DMA_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tDMA @@ -185,4 +185,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_DMA_h__ +#endif // __nFRC_2015_1_0_9_DMA_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h index 9e529f1b82..ea9a9c549e 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Encoder_h__ -#define __nFRC_2015_1_0_8_Encoder_h__ +#ifndef __nFRC_2015_1_0_9_Encoder_h__ +#define __nFRC_2015_1_0_9_Encoder_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tEncoder @@ -56,11 +56,11 @@ public: unsigned IndexSource_Module : 1; unsigned IndexSource_AnalogTrigger : 1; unsigned IndexActiveHigh : 1; + unsigned IndexEdgeSensitive : 1; unsigned Reverse : 1; - unsigned Enable : 1; #else - unsigned Enable : 1; unsigned Reverse : 1; + unsigned IndexEdgeSensitive : 1; unsigned IndexActiveHigh : 1; unsigned IndexSource_AnalogTrigger : 1; unsigned IndexSource_Module : 1; @@ -137,8 +137,8 @@ public: virtual void writeConfig_IndexSource_Module(unsigned char value, tRioStatusCode *status) = 0; virtual void writeConfig_IndexSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_IndexActiveHigh(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexEdgeSensitive(bool value, tRioStatusCode *status) = 0; virtual void writeConfig_Reverse(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable(bool value, tRioStatusCode *status) = 0; virtual tConfig readConfig(tRioStatusCode *status) = 0; virtual unsigned char readConfig_ASource_Channel(tRioStatusCode *status) = 0; virtual unsigned char readConfig_ASource_Module(tRioStatusCode *status) = 0; @@ -150,8 +150,8 @@ public: virtual unsigned char readConfig_IndexSource_Module(tRioStatusCode *status) = 0; virtual bool readConfig_IndexSource_AnalogTrigger(tRioStatusCode *status) = 0; virtual bool readConfig_IndexActiveHigh(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexEdgeSensitive(tRioStatusCode *status) = 0; virtual bool readConfig_Reverse(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable(tRioStatusCode *status) = 0; typedef enum @@ -196,4 +196,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Encoder_h__ +#endif // __nFRC_2015_1_0_9_Encoder_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h index 1a9830e808..a2aee88e60 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Global_h__ -#define __nFRC_2015_1_0_8_Global_h__ +#ifndef __nFRC_2015_1_0_9_Global_h__ +#define __nFRC_2015_1_0_9_Global_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tGlobal @@ -101,4 +101,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Global_h__ +#endif // __nFRC_2015_1_0_9_Global_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h index a20ca6f729..1460558501 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Interrupt_h__ -#define __nFRC_2015_1_0_8_Interrupt_h__ +#ifndef __nFRC_2015_1_0_9_Interrupt_h__ +#define __nFRC_2015_1_0_9_Interrupt_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tInterrupt @@ -54,9 +54,9 @@ public: typedef enum { - } tTimeStamp_IfaceConstants; + } tFallingTimeStamp_IfaceConstants; - virtual unsigned int readTimeStamp(tRioStatusCode *status) = 0; + virtual unsigned int readFallingTimeStamp(tRioStatusCode *status) = 0; typedef enum @@ -79,6 +79,13 @@ public: virtual bool readConfig_WaitForAck(tRioStatusCode *status) = 0; + typedef enum + { + } tRisingTimeStamp_IfaceConstants; + + virtual unsigned int readRisingTimeStamp(tRioStatusCode *status) = 0; + + @@ -90,4 +97,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Interrupt_h__ +#endif // __nFRC_2015_1_0_9_Interrupt_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h index 8a8c3274ad..e7c64deb8c 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_PWM_h__ -#define __nFRC_2015_1_0_8_PWM_h__ +#ifndef __nFRC_2015_1_0_9_PWM_h__ +#define __nFRC_2015_1_0_9_PWM_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tPWM @@ -117,4 +117,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_PWM_h__ +#endif // __nFRC_2015_1_0_9_PWM_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h index 40536838e8..1de4dd0f1e 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Power_h__ -#define __nFRC_2015_1_0_8_Power_h__ +#ifndef __nFRC_2015_1_0_9_Power_h__ +#define __nFRC_2015_1_0_9_Power_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tPower @@ -214,4 +214,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Power_h__ +#endif // __nFRC_2015_1_0_9_Power_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h index 0610372f5c..5f47c0a5b0 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_Relay_h__ -#define __nFRC_2015_1_0_8_Relay_h__ +#ifndef __nFRC_2015_1_0_9_Relay_h__ +#define __nFRC_2015_1_0_9_Relay_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tRelay @@ -65,4 +65,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_Relay_h__ +#endif // __nFRC_2015_1_0_9_Relay_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h index fc21637a4a..b8478da9e4 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_SPI_h__ -#define __nFRC_2015_1_0_8_SPI_h__ +#ifndef __nFRC_2015_1_0_9_SPI_h__ +#define __nFRC_2015_1_0_9_SPI_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tSPI @@ -65,4 +65,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_SPI_h__ +#endif // __nFRC_2015_1_0_9_SPI_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h index f09929b792..f67a822885 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h @@ -1,14 +1,14 @@ // Copyright (c) National Instruments 2008. All Rights Reserved. // Do Not Edit... this file is generated! -#ifndef __nFRC_2015_1_0_8_SysWatchdog_h__ -#define __nFRC_2015_1_0_8_SysWatchdog_h__ +#ifndef __nFRC_2015_1_0_9_SysWatchdog_h__ +#define __nFRC_2015_1_0_9_SysWatchdog_h__ #include "tSystemInterface.h" namespace nFPGA { -namespace nFRC_2015_1_0_8 +namespace nFRC_2015_1_0_9 { class tSysWatchdog @@ -88,6 +88,13 @@ public: virtual unsigned int readTimer(tRioStatusCode *status) = 0; + typedef enum + { + } tForcedKills_IfaceConstants; + + virtual unsigned short readForcedKills(tRioStatusCode *status) = 0; + + private: @@ -98,4 +105,4 @@ private: } } -#endif // __nFRC_2015_1_0_8_SysWatchdog_h__ +#endif // __nFRC_2015_1_0_9_SysWatchdog_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h b/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h new file mode 100644 index 0000000000..8fa593511f --- /dev/null +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h @@ -0,0 +1,17 @@ +// Describes the information needed to configure a DMA channel. +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#include + +#ifndef __tDMAChannelDescriptor_h__ +#define __tDMAChannelDescriptor_h__ + +struct tDMAChannelDescriptor +{ + uint32_t channel; + uint32_t baseAddress; + uint32_t depth; + bool targetToHost; +}; + +#endif // __tDMAChannelDescriptor_h__ diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAManager.h b/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAManager.h index 1cc7b2fac3..cb95203cca 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAManager.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/tDMAManager.h @@ -1,46 +1,41 @@ -// Class for handling DMA transters. +// Class for handling DMA transfers. // Copyright (c) National Instruments 2008. All Rights Reserved. #ifndef __tDMAManager_h__ #define __tDMAManager_h__ #include "tSystem.h" +#include namespace nFPGA { -// TODO: Implement DMA Manager -/* class tDMAManager : public tSystem { public: - tDMAManager(tNIRIO_u32 dmaChannel, tNIRIO_u32 hostBufferSize, tRioStatusCode *status); + tDMAManager(uint32_t dmaChannel, uint32_t hostBufferSize, tRioStatusCode *status); ~tDMAManager(); void start(tRioStatusCode *status); void stop(tRioStatusCode *status); bool isStarted() {return _started;} void read( - tNIRIO_u32* buf, - tNIRIO_u32 num, - tNIRIO_u32 timeout, - tNIRIO_u32* read, - tNIRIO_u32* remaining, + uint32_t* buf, + size_t num, + uint32_t timeout, + size_t* remaining, tRioStatusCode *status); void write( - tNIRIO_u32* buf, - tNIRIO_u32 num, - tNIRIO_u32 timeout, - tNIRIO_u32* remaining, + uint32_t* buf, + size_t num, + uint32_t timeout, + size_t* remaining, tRioStatusCode *status); private: bool _started; - tNIRIO_u32 _dmaChannel; - tNIRIO_u32 _hostBufferSize; - tDMAChannelDescriptor const *_dmaChannelDescriptor; + uint32_t _dmaChannel; + uint32_t _hostBufferSize; }; -*/ + } - #endif // __tDMAManager_h__ - diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/tInterruptManager.h b/hal/lib/Athena/FRC_FPGA_ChipObject/tInterruptManager.h index c7d631a0cb..b09ad988e0 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/tInterruptManager.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/tInterruptManager.h @@ -28,11 +28,11 @@ public: tInterruptManager(uint32_t interruptMask, bool watcher, tRioStatusCode *status); ~tInterruptManager(); void registerHandler(tInterruptHandler handler, void *param, tRioStatusCode *status); - uint32_t watch(int32_t timeoutInMs, tRioStatusCode *status); + uint32_t watch(int32_t timeoutInMs, bool ignorePrevious, tRioStatusCode *status); void enable(tRioStatusCode *status); void disable(tRioStatusCode *status); bool isEnabled(tRioStatusCode *status); -private: +public: class tInterruptThread; friend class tInterruptThread; void handler(); @@ -58,4 +58,3 @@ private: #endif // __tInterruptManager_h__ - diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/tSystem.h b/hal/lib/Athena/FRC_FPGA_ChipObject/tSystem.h index 412d76d701..b059e5184c 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/tSystem.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/tSystem.h @@ -20,6 +20,7 @@ public: tSystem(tRioStatusCode *status); ~tSystem(); void getFpgaGuid(uint32_t *guid_ptr, tRioStatusCode *status); + void reset(tRioStatusCode *status); protected: static NiFpga_Session _DeviceHandle; diff --git a/hal/lib/Athena/FRC_FPGA_ChipObject/tSystemInterface.h b/hal/lib/Athena/FRC_FPGA_ChipObject/tSystemInterface.h index ce7eb9b7ba..859418787e 100644 --- a/hal/lib/Athena/FRC_FPGA_ChipObject/tSystemInterface.h +++ b/hal/lib/Athena/FRC_FPGA_ChipObject/tSystemInterface.h @@ -18,8 +18,10 @@ public: virtual void getHardwareFpgaSignature(uint32_t *guid_ptr, tRioStatusCode *status)=0; virtual uint32_t getLVHandle(tRioStatusCode *status)=0; virtual uint32_t getHandle()=0; + virtual void reset(tRioStatusCode *status)=0; }; } #endif // __tSystemInterface_h__ + diff --git a/hal/lib/Athena/Interrupts.cpp b/hal/lib/Athena/Interrupts.cpp index aad7b08647..49bd2c978a 100644 --- a/hal/lib/Athena/Interrupts.cpp +++ b/hal/lib/Athena/Interrupts.cpp @@ -13,7 +13,8 @@ void* initializeInterrupts(uint32_t interruptIndex, bool watcher, int32_t *statu // Expects the calling leaf class to allocate an interrupt index. anInterrupt->anInterrupt = tInterrupt::create(interruptIndex, status); anInterrupt->anInterrupt->writeConfig_WaitForAck(false, status); - anInterrupt->manager = new tInterruptManager(1 << interruptIndex, watcher, status); + anInterrupt->manager = new tInterruptManager( + (1 << interruptIndex) | (1 << (interruptIndex + 8)), watcher, status); return anInterrupt; } @@ -29,16 +30,29 @@ void cleanInterrupts(void* interrupt_pointer, int32_t *status) /** * In synchronous mode, wait for the defined interrupt to occur. * @param timeout Timeout in seconds + * @param ignorePrevious If true, ignore interrupts that happened before + * waitForInterrupt was called. + * @return The mask of interrupts that fired. */ -void waitForInterrupt(void* interrupt_pointer, double timeout, int32_t *status) +uint32_t waitForInterrupt(void* interrupt_pointer, double timeout, bool ignorePrevious, int32_t *status) { + uint32_t result; Interrupt* anInterrupt = (Interrupt*)interrupt_pointer; - anInterrupt->manager->watch((int32_t)(timeout * 1e3), status); + + result = anInterrupt->manager->watch((int32_t)(timeout * 1e3), ignorePrevious, status); + + // Don't report a timeout as an error - the return code is enough to tell + // that a timeout happened. + if(*status == -NiFpga_Status_IrqTimeout) { + *status = NiFpga_Status_Success; + } + + return result; } /** * Enable interrupts to occur on this input. - * oInterrupts are disabled when the RequestInterrupt call is made. This gives time to do the + * Interrupts are disabled when the RequestInterrupt call is made. This gives time to do the * setup of the other options before starting to field interrupts. */ void enableInterrupts(void* interrupt_pointer, int32_t *status) @@ -52,21 +66,31 @@ void enableInterrupts(void* interrupt_pointer, int32_t *status) */ void disableInterrupts(void* interrupt_pointer, int32_t *status) { - Interrupt* anInterrupt = (Interrupt*)interrupt_pointer; anInterrupt->manager->disable(status); - } /** - * Return the timestamp for the interrupt that occurred most recently. + * Return the timestamp for the rising interrupt that occurred most recently. * This is in the same time domain as GetClock(). * @return Timestamp in seconds since boot. */ -double readInterruptTimestamp(void* interrupt_pointer, int32_t *status) +double readRisingTimestamp(void* interrupt_pointer, int32_t *status) { Interrupt* anInterrupt = (Interrupt*)interrupt_pointer; - uint32_t timestamp = anInterrupt->anInterrupt->readTimeStamp(status); + uint32_t timestamp = anInterrupt->anInterrupt->readRisingTimeStamp(status); + return timestamp * 1e-6; +} + +/** +* Return the timestamp for the falling interrupt that occurred most recently. +* This is in the same time domain as GetClock(). +* @return Timestamp in seconds since boot. +*/ +double readFallingTimestamp(void* interrupt_pointer, int32_t *status) +{ + Interrupt* anInterrupt = (Interrupt*)interrupt_pointer; + uint32_t timestamp = anInterrupt->anInterrupt->readFallingTimeStamp(status); return timestamp * 1e-6; } diff --git a/hal/lib/Athena/NetworkCommunication/FRCComm.h b/hal/lib/Athena/NetworkCommunication/FRCComm.h index 51d8488491..d542eca14b 100644 --- a/hal/lib/Athena/NetworkCommunication/FRCComm.h +++ b/hal/lib/Athena/NetworkCommunication/FRCComm.h @@ -32,6 +32,8 @@ #endif #endif +#define ERR_FRCSystem_NetCommNotResponding -44049 + enum AllianceStationID_t { kAllianceStationID_red1, kAllianceStationID_red2, @@ -68,7 +70,7 @@ struct JoystickAxes_t { struct JoystickPOV_t { uint16_t count; - uint16_t povs[1]; + int16_t povs[1]; }; #ifdef __cplusplus @@ -81,9 +83,6 @@ extern "C" { int EXPORT_FUNC setStatusData(float battery, uint8_t dsDigitalOut, uint8_t updateNumber, const char *userDataHigh, int userDataHighLength, const char *userDataLow, int userDataLowLength, int wait_ms); - int EXPORT_FUNC setStatusDataFloatAsInt(int battery, uint8_t dsDigitalOut, uint8_t updateNumber, - const char *userDataHigh, int userDataHighLength, - const char *userDataLow, int userDataLowLength, int wait_ms); int EXPORT_FUNC setErrorData(const char *errors, int errorsLength, int wait_ms); #ifdef SIMULATION @@ -101,9 +100,13 @@ extern "C" { int EXPORT_FUNC FRC_NetworkCommunication_getControlWord(struct ControlWord_t *controlWord); int EXPORT_FUNC FRC_NetworkCommunication_getAllianceStation(enum AllianceStationID_t *allianceStation); + int EXPORT_FUNC FRC_NetworkCommunication_getMatchTime(float *matchTime); int EXPORT_FUNC FRC_NetworkCommunication_getJoystickAxes(uint8_t joystickNum, struct JoystickAxes_t *axes, uint8_t maxAxes); int EXPORT_FUNC FRC_NetworkCommunication_getJoystickButtons(uint8_t joystickNum, uint32_t *buttons, uint8_t *count); int EXPORT_FUNC FRC_NetworkCommunication_getJoystickPOVs(uint8_t joystickNum, struct JoystickPOV_t *povs, uint8_t maxPOVs); + int EXPORT_FUNC FRC_NetworkCommunication_setJoystickOutputs(uint8_t joystickNum, uint32_t hidOutputs, uint16_t leftRumble, uint16_t rightRumble); + int EXPORT_FUNC FRC_NetworkCommunication_getJoystickDesc(uint8_t joystickNum, uint8_t *isXBox, uint8_t *type, char *name, + uint8_t *axisCount, uint8_t *axisTypes, uint8_t *buttonCount, uint8_t *povCount); void EXPORT_FUNC FRC_NetworkCommunication_getVersionString(char *version); int EXPORT_FUNC FRC_NetworkCommunication_observeUserProgramStarting(void); diff --git a/ni-libraries/libFRC_NetworkCommunication.so b/ni-libraries/libFRC_NetworkCommunication.so index 3a86febfd2..a24218eec1 100644 Binary files a/ni-libraries/libFRC_NetworkCommunication.so and b/ni-libraries/libFRC_NetworkCommunication.so differ diff --git a/ni-libraries/libFRC_NetworkCommunication.so.1 b/ni-libraries/libFRC_NetworkCommunication.so.1 index 3a86febfd2..e1ec38ab36 100644 Binary files a/ni-libraries/libFRC_NetworkCommunication.so.1 and b/ni-libraries/libFRC_NetworkCommunication.so.1 differ diff --git a/ni-libraries/libFRC_NetworkCommunication.so.1.5.0 b/ni-libraries/libFRC_NetworkCommunication.so.1.5.0 old mode 100644 new mode 100755 index 3a86febfd2..fded9d7bbf Binary files a/ni-libraries/libFRC_NetworkCommunication.so.1.5.0 and b/ni-libraries/libFRC_NetworkCommunication.so.1.5.0 differ diff --git a/ni-libraries/libFRC_NetworkCommunicationLV.so b/ni-libraries/libFRC_NetworkCommunicationLV.so index b3ae41512c..c7c2653383 100644 Binary files a/ni-libraries/libFRC_NetworkCommunicationLV.so and b/ni-libraries/libFRC_NetworkCommunicationLV.so differ diff --git a/ni-libraries/libFRC_NetworkCommunicationLV.so.1 b/ni-libraries/libFRC_NetworkCommunicationLV.so.1 index b3ae41512c..1254b6d71d 100644 Binary files a/ni-libraries/libFRC_NetworkCommunicationLV.so.1 and b/ni-libraries/libFRC_NetworkCommunicationLV.so.1 differ diff --git a/ni-libraries/libFRC_NetworkCommunicationLV.so.1.5.0 b/ni-libraries/libFRC_NetworkCommunicationLV.so.1.5.0 old mode 100644 new mode 100755 index b3ae41512c..707be3db27 Binary files a/ni-libraries/libFRC_NetworkCommunicationLV.so.1.5.0 and b/ni-libraries/libFRC_NetworkCommunicationLV.so.1.5.0 differ diff --git a/ni-libraries/libNiFpga.so b/ni-libraries/libNiFpga.so index 9f26024c3f..c506470ba0 100644 --- a/ni-libraries/libNiFpga.so +++ b/ni-libraries/libNiFpga.so @@ -1,2 +1,2 @@ OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libNiFpga.so.13 ) +GROUP ( libNiFpga.so.14 ) diff --git a/ni-libraries/libNiFpga.so.13 b/ni-libraries/libNiFpga.so.13 deleted file mode 100755 index 008606aef9..0000000000 Binary files a/ni-libraries/libNiFpga.so.13 and /dev/null differ diff --git a/ni-libraries/libfrccansae.so b/ni-libraries/libNiFpga.so.14 similarity index 52% rename from ni-libraries/libfrccansae.so rename to ni-libraries/libNiFpga.so.14 index c6efb2b1f0..3b66e3e821 100644 --- a/ni-libraries/libfrccansae.so +++ b/ni-libraries/libNiFpga.so.14 @@ -1,2 +1,2 @@ OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libfrccansae.so.1 ) +GROUP ( libNiFpga.so.14.0 ) diff --git a/ni-libraries/libni_emb.so b/ni-libraries/libNiFpga.so.14.0 similarity index 50% rename from ni-libraries/libni_emb.so rename to ni-libraries/libNiFpga.so.14.0 index 9c868d372e..aa4e2874ca 100644 --- a/ni-libraries/libni_emb.so +++ b/ni-libraries/libNiFpga.so.14.0 @@ -1,2 +1,2 @@ OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libni_emb.so.6 ) +GROUP ( libNiFpga.so.14.0.0 ) diff --git a/ni-libraries/libNiFpga.so.14.0.0 b/ni-libraries/libNiFpga.so.14.0.0 new file mode 100755 index 0000000000..1f3a23740e Binary files /dev/null and b/ni-libraries/libNiFpga.so.14.0.0 differ diff --git a/ni-libraries/libNiFpgaLv.so b/ni-libraries/libNiFpgaLv.so index 5b915e57a8..88b5a24d94 100644 --- a/ni-libraries/libNiFpgaLv.so +++ b/ni-libraries/libNiFpgaLv.so @@ -1,2 +1,2 @@ OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libNiFpgaLv.so.13 ) +GROUP ( libNiFpgaLv.so.14 ) diff --git a/ni-libraries/libNiFpgaLv.so.13 b/ni-libraries/libNiFpgaLv.so.13 deleted file mode 100755 index 4069f91122..0000000000 Binary files a/ni-libraries/libNiFpgaLv.so.13 and /dev/null differ diff --git a/ni-libraries/libni_rtlog.so b/ni-libraries/libNiFpgaLv.so.14 similarity index 50% rename from ni-libraries/libni_rtlog.so rename to ni-libraries/libNiFpgaLv.so.14 index 30456810f7..3adae09d7b 100644 --- a/ni-libraries/libni_rtlog.so +++ b/ni-libraries/libNiFpgaLv.so.14 @@ -1,2 +1,2 @@ OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libni_rtlog.so.2 ) +GROUP ( libNiFpgaLv.so.14.0 ) diff --git a/ni-libraries/libNiFpgaLv.so.14.0 b/ni-libraries/libNiFpgaLv.so.14.0 new file mode 100644 index 0000000000..db0b28c030 --- /dev/null +++ b/ni-libraries/libNiFpgaLv.so.14.0 @@ -0,0 +1,2 @@ +OUTPUT_FORMAT(elf32-littlearm) +GROUP ( libNiFpgaLv.so.14.0.0 ) diff --git a/ni-libraries/libNiFpgaLv.so.14.0.0 b/ni-libraries/libNiFpgaLv.so.14.0.0 new file mode 100755 index 0000000000..3efee8fcba Binary files /dev/null and b/ni-libraries/libNiFpgaLv.so.14.0.0 differ diff --git a/ni-libraries/libNiRioSrv.so b/ni-libraries/libNiRioSrv.so index 99d3772eb5..98b55b12c4 100644 --- a/ni-libraries/libNiRioSrv.so +++ b/ni-libraries/libNiRioSrv.so @@ -1,2 +1,2 @@ OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libNiRioSrv.so.13 ) +GROUP ( libNiRioSrv.so.14 ) diff --git a/ni-libraries/libNiRioSrv.so.13 b/ni-libraries/libNiRioSrv.so.13 deleted file mode 100755 index 9ca867a2b7..0000000000 Binary files a/ni-libraries/libNiRioSrv.so.13 and /dev/null differ diff --git a/ni-libraries/libNiRioSrv.so.14 b/ni-libraries/libNiRioSrv.so.14 new file mode 100644 index 0000000000..ef98d561bb --- /dev/null +++ b/ni-libraries/libNiRioSrv.so.14 @@ -0,0 +1,2 @@ +OUTPUT_FORMAT(elf32-littlearm) +GROUP ( libNiRioSrv.so.14.0 ) diff --git a/ni-libraries/libNiRioSrv.so.14.0 b/ni-libraries/libNiRioSrv.so.14.0 new file mode 100644 index 0000000000..7ee207df01 --- /dev/null +++ b/ni-libraries/libNiRioSrv.so.14.0 @@ -0,0 +1,2 @@ +OUTPUT_FORMAT(elf32-littlearm) +GROUP ( libNiRioSrv.so.14.0.0 ) diff --git a/ni-libraries/libNiRioSrv.so.14.0.0 b/ni-libraries/libNiRioSrv.so.14.0.0 new file mode 100755 index 0000000000..4917af81d2 Binary files /dev/null and b/ni-libraries/libNiRioSrv.so.14.0.0 differ diff --git a/ni-libraries/libRoboRIO_FRC_ChipObject.so b/ni-libraries/libRoboRIO_FRC_ChipObject.so index 23663a9bd4..b44dc03baf 100644 Binary files a/ni-libraries/libRoboRIO_FRC_ChipObject.so and b/ni-libraries/libRoboRIO_FRC_ChipObject.so differ diff --git a/ni-libraries/libRoboRIO_FRC_ChipObject.so.1 b/ni-libraries/libRoboRIO_FRC_ChipObject.so.1 index 23663a9bd4..fff4f97abe 100644 Binary files a/ni-libraries/libRoboRIO_FRC_ChipObject.so.1 and b/ni-libraries/libRoboRIO_FRC_ChipObject.so.1 differ diff --git a/ni-libraries/libRoboRIO_FRC_ChipObject.so.1.2.0 b/ni-libraries/libRoboRIO_FRC_ChipObject.so.1.2.0 old mode 100644 new mode 100755 index 23663a9bd4..63c3c6e0c5 Binary files a/ni-libraries/libRoboRIO_FRC_ChipObject.so.1.2.0 and b/ni-libraries/libRoboRIO_FRC_ChipObject.so.1.2.0 differ diff --git a/ni-libraries/libfrccanfirmwareupdate.so b/ni-libraries/libfrccanfirmwareupdate.so deleted file mode 100644 index 152d474c4d..0000000000 Binary files a/ni-libraries/libfrccanfirmwareupdate.so and /dev/null differ diff --git a/ni-libraries/libfrccansae.so.1 b/ni-libraries/libfrccansae.so.1 deleted file mode 100644 index 8dfc4d112c..0000000000 Binary files a/ni-libraries/libfrccansae.so.1 and /dev/null differ diff --git a/ni-libraries/libfrccansae.so.1.0 b/ni-libraries/libfrccansae.so.1.0 deleted file mode 100644 index a4dbf588e6..0000000000 --- a/ni-libraries/libfrccansae.so.1.0 +++ /dev/null @@ -1,2 +0,0 @@ -OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libfrccansae.so.1.0.0 ) diff --git a/ni-libraries/libfrccansae.so.1.0.0 b/ni-libraries/libfrccansae.so.1.0.0 deleted file mode 100644 index 8dfc4d112c..0000000000 Binary files a/ni-libraries/libfrccansae.so.1.0.0 and /dev/null differ diff --git a/ni-libraries/libi2c.so b/ni-libraries/libi2c.so index 84707632e9..673ca375fe 100644 Binary files a/ni-libraries/libi2c.so and b/ni-libraries/libi2c.so differ diff --git a/ni-libraries/libi2c.so.1 b/ni-libraries/libi2c.so.1 index 84707632e9..e10758b25e 100644 Binary files a/ni-libraries/libi2c.so.1 and b/ni-libraries/libi2c.so.1 differ diff --git a/ni-libraries/libi2c.so.1.0.0 b/ni-libraries/libi2c.so.1.0.0 old mode 100644 new mode 100755 diff --git a/ni-libraries/libni_emb.so.6 b/ni-libraries/libni_emb.so.6 deleted file mode 100755 index f0b10fd3d5..0000000000 Binary files a/ni-libraries/libni_emb.so.6 and /dev/null differ diff --git a/ni-libraries/libni_rtlog.so.2 b/ni-libraries/libni_rtlog.so.2 deleted file mode 100755 index 02d86cf005..0000000000 Binary files a/ni-libraries/libni_rtlog.so.2 and /dev/null differ diff --git a/ni-libraries/libnirio_emb_can.so b/ni-libraries/libnirio_emb_can.so deleted file mode 100644 index eeb81339f5..0000000000 --- a/ni-libraries/libnirio_emb_can.so +++ /dev/null @@ -1,2 +0,0 @@ -OUTPUT_FORMAT(elf32-littlearm) -GROUP ( libnirio_emb_can.so.14 ) diff --git a/ni-libraries/libnirio_emb_can.so.14 b/ni-libraries/libnirio_emb_can.so.14 deleted file mode 100755 index 6e97425b4c..0000000000 Binary files a/ni-libraries/libnirio_emb_can.so.14 and /dev/null differ diff --git a/ni-libraries/libspi.so b/ni-libraries/libspi.so index 19870c63d6..e77606f676 100644 Binary files a/ni-libraries/libspi.so and b/ni-libraries/libspi.so differ diff --git a/ni-libraries/libspi.so.1 b/ni-libraries/libspi.so.1 index 19870c63d6..5aa0632f71 100644 Binary files a/ni-libraries/libspi.so.1 and b/ni-libraries/libspi.so.1 differ diff --git a/ni-libraries/libspi.so.1.0.0 b/ni-libraries/libspi.so.1.0.0 old mode 100644 new mode 100755 diff --git a/ni-libraries/libvisa.so b/ni-libraries/libvisa.so deleted file mode 100755 index 4ca711ce90..0000000000 Binary files a/ni-libraries/libvisa.so and /dev/null differ diff --git a/wpilibc/wpilibC++Devices/include/InterruptableSensorBase.h b/wpilibc/wpilibC++Devices/include/InterruptableSensorBase.h index 1c4f161bc2..f56cfafd60 100644 --- a/wpilibc/wpilibC++Devices/include/InterruptableSensorBase.h +++ b/wpilibc/wpilibC++Devices/include/InterruptableSensorBase.h @@ -12,15 +12,23 @@ class InterruptableSensorBase : public SensorBase { public: + enum WaitResult { + kTimeout = 0x0, + kRisingEdge = 0x1, + kFallingEdge = 0x100, + kBoth = 0x101, + }; + InterruptableSensorBase(); virtual ~InterruptableSensorBase(); virtual void RequestInterrupts(InterruptHandlerFunction handler, void *param) = 0; ///< Asynchronus handler version. virtual void RequestInterrupts() = 0; ///< Synchronus Wait version. virtual void CancelInterrupts(); ///< Free up the underlying chipobject functions. - virtual void WaitForInterrupt(float timeout); ///< Synchronus version. + virtual WaitResult WaitForInterrupt(float timeout, bool ignorePrevious = true); ///< Synchronus version. virtual void EnableInterrupts(); ///< Enable interrupts - after finishing setup. virtual void DisableInterrupts(); ///< Disable, but don't deallocate. - virtual double ReadInterruptTimestamp();///< Return the timestamp for the interrupt that occurred. + virtual double ReadRisingTimestamp();///< Return the timestamp for the rising interrupt that occurred. + virtual double ReadFallingTimestamp();///< Return the timestamp for the falling interrupt that occurred. protected: void* m_interrupt; uint32_t m_interruptIndex; diff --git a/wpilibc/wpilibC++Devices/include/NetworkCommunication/FRCComm.h b/wpilibc/wpilibC++Devices/include/NetworkCommunication/FRCComm.h index 51d8488491..d542eca14b 100644 --- a/wpilibc/wpilibC++Devices/include/NetworkCommunication/FRCComm.h +++ b/wpilibc/wpilibC++Devices/include/NetworkCommunication/FRCComm.h @@ -32,6 +32,8 @@ #endif #endif +#define ERR_FRCSystem_NetCommNotResponding -44049 + enum AllianceStationID_t { kAllianceStationID_red1, kAllianceStationID_red2, @@ -68,7 +70,7 @@ struct JoystickAxes_t { struct JoystickPOV_t { uint16_t count; - uint16_t povs[1]; + int16_t povs[1]; }; #ifdef __cplusplus @@ -81,9 +83,6 @@ extern "C" { int EXPORT_FUNC setStatusData(float battery, uint8_t dsDigitalOut, uint8_t updateNumber, const char *userDataHigh, int userDataHighLength, const char *userDataLow, int userDataLowLength, int wait_ms); - int EXPORT_FUNC setStatusDataFloatAsInt(int battery, uint8_t dsDigitalOut, uint8_t updateNumber, - const char *userDataHigh, int userDataHighLength, - const char *userDataLow, int userDataLowLength, int wait_ms); int EXPORT_FUNC setErrorData(const char *errors, int errorsLength, int wait_ms); #ifdef SIMULATION @@ -101,9 +100,13 @@ extern "C" { int EXPORT_FUNC FRC_NetworkCommunication_getControlWord(struct ControlWord_t *controlWord); int EXPORT_FUNC FRC_NetworkCommunication_getAllianceStation(enum AllianceStationID_t *allianceStation); + int EXPORT_FUNC FRC_NetworkCommunication_getMatchTime(float *matchTime); int EXPORT_FUNC FRC_NetworkCommunication_getJoystickAxes(uint8_t joystickNum, struct JoystickAxes_t *axes, uint8_t maxAxes); int EXPORT_FUNC FRC_NetworkCommunication_getJoystickButtons(uint8_t joystickNum, uint32_t *buttons, uint8_t *count); int EXPORT_FUNC FRC_NetworkCommunication_getJoystickPOVs(uint8_t joystickNum, struct JoystickPOV_t *povs, uint8_t maxPOVs); + int EXPORT_FUNC FRC_NetworkCommunication_setJoystickOutputs(uint8_t joystickNum, uint32_t hidOutputs, uint16_t leftRumble, uint16_t rightRumble); + int EXPORT_FUNC FRC_NetworkCommunication_getJoystickDesc(uint8_t joystickNum, uint8_t *isXBox, uint8_t *type, char *name, + uint8_t *axisCount, uint8_t *axisTypes, uint8_t *buttonCount, uint8_t *povCount); void EXPORT_FUNC FRC_NetworkCommunication_getVersionString(char *version); int EXPORT_FUNC FRC_NetworkCommunication_observeUserProgramStarting(void); diff --git a/wpilibc/wpilibC++Devices/src/Counter.cpp b/wpilibc/wpilibC++Devices/src/Counter.cpp index 8c71d9e987..904345aed6 100644 --- a/wpilibc/wpilibC++Devices/src/Counter.cpp +++ b/wpilibc/wpilibC++Devices/src/Counter.cpp @@ -32,11 +32,6 @@ void Counter::InitCounter(Mode mode) m_allocatedDownSource = false; HALReport(HALUsageReporting::kResourceType_Counter, index, mode); - - if (StatusIsFatal()) return; - status = 0; - startCounter(m_counter, &status); - wpi_setErrorWithContext(status, getHALErrorMessage(status)); } /** diff --git a/wpilibc/wpilibC++Devices/src/Encoder.cpp b/wpilibc/wpilibC++Devices/src/Encoder.cpp index 31f153d834..5934ae5790 100644 --- a/wpilibc/wpilibC++Devices/src/Encoder.cpp +++ b/wpilibc/wpilibC++Devices/src/Encoder.cpp @@ -67,13 +67,6 @@ void Encoder::InitEncoder(bool reverseDirection, EncodingType encodingType) HALReport(HALUsageReporting::kResourceType_Encoder, index, encodingType); LiveWindow::GetInstance()->AddSensor("Encoder", m_aSource->GetChannelForRouting(), this); - - if (StatusIsFatal()) return; - if (!m_counter) { - int32_t status = 0; - startEncoder(m_encoder, &status); - wpi_setErrorWithContext(status, getHALErrorMessage(status)); - } } /** diff --git a/wpilibc/wpilibC++Devices/src/InterruptableSensorBase.cpp b/wpilibc/wpilibC++Devices/src/InterruptableSensorBase.cpp index 02f5713684..73ef6ee794 100644 --- a/wpilibc/wpilibC++Devices/src/InterruptableSensorBase.cpp +++ b/wpilibc/wpilibC++Devices/src/InterruptableSensorBase.cpp @@ -46,13 +46,20 @@ void InterruptableSensorBase::CancelInterrupts() /** * In synchronous mode, wait for the defined interrupt to occur. * @param timeout Timeout in seconds + * @param ignorePrevious If true, ignore interrupts that happened before + * WaitForInterrupt was called. + * @return What interrupts fired */ -void InterruptableSensorBase::WaitForInterrupt(float timeout) +InterruptableSensorBase::WaitResult InterruptableSensorBase::WaitForInterrupt(float timeout, bool ignorePrevious) { wpi_assert(m_interrupt != NULL); int32_t status = 0; - waitForInterrupt(m_interrupt, timeout, &status); + uint32_t result; + + result = waitForInterrupt(m_interrupt, timeout, ignorePrevious, &status); wpi_setErrorWithContext(status, getHALErrorMessage(status)); + + return static_cast(result); } /** @@ -80,15 +87,33 @@ void InterruptableSensorBase::DisableInterrupts() } /** - * Return the timestamp for the interrupt that occurred most recently. + * Return the timestamp for the rising interrupt that occurred most recently. * This is in the same time domain as GetClock(). + * The rising-edge interrupt should be enabled with + * {@link #DigitalInput.SetUpSourceEdge} * @return Timestamp in seconds since boot. */ -double InterruptableSensorBase::ReadInterruptTimestamp() +double InterruptableSensorBase::ReadRisingTimestamp() { wpi_assert(m_interrupt != NULL); int32_t status = 0; - double timestamp = readInterruptTimestamp(m_interrupt, &status); + double timestamp = readRisingTimestamp(m_interrupt, &status); + wpi_setErrorWithContext(status, getHALErrorMessage(status)); + return timestamp; +} + +/** + * Return the timestamp for the falling interrupt that occurred most recently. + * This is in the same time domain as GetClock(). + * The falling-edge interrupt should be enabled with + * {@link #DigitalInput.SetUpSourceEdge} + * @return Timestamp in seconds since boot. +*/ +double InterruptableSensorBase::ReadFallingTimestamp() +{ + wpi_assert(m_interrupt != NULL); + int32_t status = 0; + double timestamp = readFallingTimestamp(m_interrupt, &status); wpi_setErrorWithContext(status, getHALErrorMessage(status)); return timestamp; } diff --git a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Counter.java b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Counter.java index 3deca9a957..d6550ea23c 100644 --- a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Counter.java +++ b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Counter.java @@ -88,11 +88,6 @@ public class Counter extends SensorBase implements CounterBase, UsageReporting.report(tResourceType.kResourceType_Counter, m_index, mode.value); - - status = ByteBuffer.allocateDirect(4); - status.order(ByteOrder.LITTLE_ENDIAN); - CounterJNI.startCounter(m_counter, status.asIntBuffer()); - HALUtil.checkStatus(status.asIntBuffer()); } /** @@ -325,7 +320,7 @@ public class Counter extends SensorBase implements CounterBase, if(source == null){ throw new NullPointerException("The Digital Source given was null"); } - + if (m_downSource != null && m_allocatedDownSource) { m_downSource.free(); m_allocatedDownSource = false; @@ -358,7 +353,7 @@ public class Counter extends SensorBase implements CounterBase, if (triggerType == null){ throw new NullPointerException("Analog Trigger Type given was null"); } - + setDownSource(analogTrigger.createOutput(triggerType)); m_allocatedDownSource = true; } diff --git a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Encoder.java b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Encoder.java index fbc3a4864f..14d4a06629 100644 --- a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Encoder.java +++ b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/Encoder.java @@ -107,14 +107,6 @@ public class Encoder extends SensorBase implements CounterBase, PIDSource, LiveW UsageReporting.report(tResourceType.kResourceType_Encoder, m_index, m_encodingType.value); LiveWindow.addSensor("Encoder", m_aSource.getChannelForRouting(), this); - - if (m_counter == null) { - ByteBuffer status = ByteBuffer.allocateDirect(4); - // set the byte order - status.order(ByteOrder.LITTLE_ENDIAN); - EncoderJNI.startEncoder(m_encoder, status.asIntBuffer()); - HALUtil.checkStatus(status.asIntBuffer()); - } } /** diff --git a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/InterruptableSensorBase.java b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/InterruptableSensorBase.java index d92c28afb0..6d5e2c8c4b 100644 --- a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/InterruptableSensorBase.java +++ b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/InterruptableSensorBase.java @@ -19,7 +19,7 @@ import edu.wpi.first.wpilibj.util.CheckedAllocationException; * Base for sensors to be used with interrupts */ public abstract class InterruptableSensorBase extends SensorBase { - /** + /** * This is done to store the JVM variable in the InterruptJNI * This is done because the HAL must have access to the JVM variable * in order to attach the newly spawned thread when an interrupt is fired. @@ -35,12 +35,12 @@ public abstract class InterruptableSensorBase extends SensorBase { * The interrupt resource */ protected ByteBuffer m_interrupt = null; - + /** * Flags if the interrupt being allocated is synchronous */ protected boolean m_isSynchronousInterrupt = false; - + /** * The index of the interrupt */ @@ -56,7 +56,7 @@ public abstract class InterruptableSensorBase extends SensorBase { public InterruptableSensorBase() { m_interrupt = null; } - + /** * @return */ @@ -71,7 +71,7 @@ public abstract class InterruptableSensorBase extends SensorBase { * @return */ abstract byte getModuleForRouting(); - + /** * Request interrupts asynchronously on this digital input. * @@ -80,16 +80,16 @@ public abstract class InterruptableSensorBase extends SensorBase { * {@link InterruptHandlerFunction#interruptFired(int, Object)} that * will be called whenever there is an interrupt on this device. * Request interrupts in synchronus mode where the user program - * interrupt handler will be called when an interrupt occurs. The + * interrupt handler will be called when an interrupt occurs. The * default is interrupt on rising edges only. */ public void requestInterrupts(InterruptHandlerFunction handler) { if(m_interrupt != null){ throw new AllocationException("The interrupt has already been allocated"); } - + allocateInterrupts(false); - + assert (m_interrupt != null); ByteBuffer status = ByteBuffer.allocateDirect(4); @@ -114,7 +114,7 @@ public abstract class InterruptableSensorBase extends SensorBase { if(m_interrupt != null){ throw new AllocationException("The interrupt has already been allocated"); } - + allocateInterrupts(true); assert (m_interrupt != null); @@ -132,7 +132,7 @@ public abstract class InterruptableSensorBase extends SensorBase { /** * Allocate the interrupt - * + * * @param watcher true if the interrupt should be in synchronous mode where the user * program will have to explicitly wait for the interrupt to occur. */ @@ -170,20 +170,33 @@ public abstract class InterruptableSensorBase extends SensorBase { /** * In synchronous mode, wait for the defined interrupt to occur. - * + * * @param timeout * Timeout in seconds + * @param ignorePrevious + * If true, ignore interrupts that happened before + * waitForInterrupt was called. */ - public void waitForInterrupt(double timeout) { + public void waitForInterrupt(double timeout, boolean ignorePrevious) { if (m_interrupt == null) { throw new IllegalStateException("The interrupt is not allocated."); } ByteBuffer status = ByteBuffer.allocateDirect(4); status.order(ByteOrder.LITTLE_ENDIAN); - InterruptJNI.waitForInterrupt(m_interrupt, (float) timeout, status.asIntBuffer()); + InterruptJNI.waitForInterrupt(m_interrupt, (float) timeout, ignorePrevious, status.asIntBuffer()); HALUtil.checkStatus(status.asIntBuffer()); } + /** + * In synchronous mode, wait for the defined interrupt to occur. + * + * @param timeout + * Timeout in seconds + */ + public void waitForInterrupt(double timeout) { + waitForInterrupt(timeout, true); + } + /** * Enable interrupts to occur on this input. Interrupts are disabled when * the RequestInterrupt call is made. This gives time to do the setup of the @@ -219,22 +232,41 @@ public abstract class InterruptableSensorBase extends SensorBase { } /** - * Return the timestamp for the interrupt that occurred most recently. This - * is in the same time domain as getClock(). - * + * Return the timestamp for the rising interrupt that occurred most + * recently. This is in the same time domain as getClock(). + * The rising-edge interrupt should be enabled with + * {@link #setUpSourceEdge} * @return Timestamp in seconds since boot. */ - public double readInterruptTimestamp() { + public double readRisingTimestamp() { if (m_interrupt == null) { throw new IllegalStateException("The interrupt is not allocated."); } ByteBuffer status = ByteBuffer.allocateDirect(4); status.order(ByteOrder.LITTLE_ENDIAN); - double timestamp = InterruptJNI.readInterruptTimestamp(m_interrupt, status.asIntBuffer()); + double timestamp = InterruptJNI.readRisingTimestamp(m_interrupt, status.asIntBuffer()); HALUtil.checkStatus(status.asIntBuffer()); return timestamp; } - + + /** + * Return the timestamp for the falling interrupt that occurred most + * recently. This is in the same time domain as getClock(). + * The falling-edge interrupt should be enabled with + * {@link #setUpSourceEdge} + * @return Timestamp in seconds since boot. + */ + public double readFallingTimestamp() { + if (m_interrupt == null) { + throw new IllegalStateException("The interrupt is not allocated."); + } + ByteBuffer status = ByteBuffer.allocateDirect(4); + status.order(ByteOrder.LITTLE_ENDIAN); + double timestamp = InterruptJNI.readFallingTimestamp(m_interrupt, status.asIntBuffer()); + HALUtil.checkStatus(status.asIntBuffer()); + return timestamp; + } + /** * Set which edge to trigger interrupts on * diff --git a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/CounterJNI.java b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/CounterJNI.java index 60f0e1706e..3baf2ede9f 100644 --- a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/CounterJNI.java +++ b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/CounterJNI.java @@ -19,8 +19,6 @@ public class CounterJNI extends JNIWrapper { public static native void setCounterPulseLengthMode(ByteBuffer counter_pointer, double threshold, IntBuffer status); public static native int getCounterSamplesToAverage(ByteBuffer counter_pointer, IntBuffer status); public static native void setCounterSamplesToAverage(ByteBuffer counter_pointer, int samplesToAverage, IntBuffer status); - public static native void startCounter(ByteBuffer counter_pointer, IntBuffer status); - public static native void stopCounter(ByteBuffer counter_pointer, IntBuffer status); public static native void resetCounter(ByteBuffer counter_pointer, IntBuffer status); public static native int getCounter(ByteBuffer counter_pointer, IntBuffer status); public static native double getCounterPeriod(ByteBuffer counter_pointer, IntBuffer status); diff --git a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/EncoderJNI.java b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/EncoderJNI.java index 1d51db3dbf..be23668ce0 100644 --- a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/EncoderJNI.java +++ b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/EncoderJNI.java @@ -6,8 +6,6 @@ import java.nio.ByteBuffer; public class EncoderJNI extends JNIWrapper { public static native ByteBuffer initializeEncoder(byte port_a_module, int port_a_pin, byte port_a_analog_trigger, byte port_b_module, int port_b_pin, byte port_b_analog_trigger, byte reverseDirection, IntBuffer index, IntBuffer status); public static native void freeEncoder(ByteBuffer encoder_pointer, IntBuffer status); - public static native void startEncoder(ByteBuffer encoder_pointer, IntBuffer status); - public static native void stopEncoder(ByteBuffer encoder_pointer, IntBuffer status); public static native void resetEncoder(ByteBuffer encoder_pointer, IntBuffer status); public static native int getEncoder(ByteBuffer encoder_pointer, IntBuffer status); public static native double getEncoderPeriod(ByteBuffer encoder_pointer, IntBuffer status); diff --git a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/InterruptJNI.java b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/InterruptJNI.java index 9e18d7a18d..b7a31cf7c5 100644 --- a/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/InterruptJNI.java +++ b/wpilibj/wpilibJavaDevices/src/main/java/edu/wpi/first/wpilibj/hal/InterruptJNI.java @@ -10,10 +10,11 @@ public class InterruptJNI extends JNIWrapper { public static native void initializeInterruptJVM(IntBuffer status); public static native ByteBuffer initializeInterrupts(int interruptIndex, byte watcher, IntBuffer status); public static native void cleanInterrupts(ByteBuffer interrupt_pointer, IntBuffer status); - public static native void waitForInterrupt(ByteBuffer interrupt_pointer, double timeout, IntBuffer status); + public static native int waitForInterrupt(ByteBuffer interrupt_pointer, double timeout, boolean ignorePrevious, IntBuffer status); public static native void enableInterrupts(ByteBuffer interrupt_pointer, IntBuffer status); public static native void disableInterrupts(ByteBuffer interrupt_pointer, IntBuffer status); - public static native double readInterruptTimestamp(ByteBuffer interrupt_pointer, IntBuffer status); + public static native double readRisingTimestamp(ByteBuffer interrupt_pointer, IntBuffer status); + public static native double readFallingTimestamp(ByteBuffer interrupt_pointer, IntBuffer status); public static native void requestInterrupts(ByteBuffer interrupt_pointer, byte routing_module, int routing_pin, byte routing_analog_trigger, IntBuffer status); public static native void attachInterruptHandler(ByteBuffer interrupt_pointer, InterruptJNIHandlerFunction handler, Object param, IntBuffer status); public static native void setInterruptUpSourceEdge(ByteBuffer interrupt_pointer, byte risingEdge, byte fallingEdge, IntBuffer status); diff --git a/wpilibj/wpilibJavaIntegrationTests/src/main/java/edu/wpi/first/wpilibj/AbstractInterruptTest.java b/wpilibj/wpilibJavaIntegrationTests/src/main/java/edu/wpi/first/wpilibj/AbstractInterruptTest.java index 967bfefddb..ef4e2bfb61 100644 --- a/wpilibj/wpilibJavaIntegrationTests/src/main/java/edu/wpi/first/wpilibj/AbstractInterruptTest.java +++ b/wpilibj/wpilibJavaIntegrationTests/src/main/java/edu/wpi/first/wpilibj/AbstractInterruptTest.java @@ -24,13 +24,13 @@ import edu.wpi.first.wpilibj.test.AbstractComsSetup; /** * This class should not be run as a test explicitly. Instead it should be extended by tests that use the InterruptableSensorBase - * + * * @author jonathanleitschuh * */ public abstract class AbstractInterruptTest extends AbstractComsSetup { private InterruptableSensorBase interruptable = null; - + private InterruptableSensorBase getInterruptable(){ if(interruptable == null){ interruptable = giveInterruptableSensorBase(); @@ -46,7 +46,7 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { interruptable = null; } } - + /** * Give the interruptible sensor base that interrupts can be attached to. * @return @@ -64,19 +64,19 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { * Perform whatever action is required to set the interrupt low. */ abstract void setInterruptLow(); - - + + private class InterruptCounter{ private final AtomicInteger count = new AtomicInteger(); void increment(){ count.addAndGet(1); } - + int getCount(){ return count.get(); } }; - + private class TestInterruptHandlerFunction extends InterruptHandlerFunction{ protected final AtomicBoolean exceptionThrown = new AtomicBoolean(false); /** Stores the time that the interrupt fires */ @@ -85,11 +85,11 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { final AtomicBoolean interruptComplete = new AtomicBoolean(false); protected Exception ex; final InterruptCounter counter; - + TestInterruptHandlerFunction(InterruptCounter counter){ this.counter = counter; } - + @Override void interruptFired(int interruptAssertedMask, InterruptCounter param) { interruptFireTime.set(Utility.getFPGATime()); @@ -104,60 +104,60 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { } interruptComplete.set(true); }; - + @Override public InterruptCounter overridableParamater(){ return counter; } }; - + @Test(timeout = 1000) public void testSingleInterruptsTriggering() throws Exception{ //Given final InterruptCounter counter = new InterruptCounter(); TestInterruptHandlerFunction function = new TestInterruptHandlerFunction(counter); - + //When getInterruptable().requestInterrupts(function); getInterruptable().enableInterrupts(); - + setInterruptLow(); Timer.delay(0.01); //Note: Utility.getFPGATime() is used because double values can turn over after the robot has been running for a long time final long interruptTriggerTime = Utility.getFPGATime(); setInterruptHigh(); - + //Delay until the interrupt is complete while(!function.interruptComplete.get()){ Timer.delay(.005); } - - + + //Then assertEquals("The interrupt did not fire the expected number of times", 1, counter.getCount()); //If the test within the interrupt failed if(function.exceptionThrown.get()){ throw function.ex; } - final long range = 10000; //in microseconds + final long range = 10000; //in microseconds assertThat("The interrupt did not fire within the expected time period (values in milliseconds)", function.interruptFireTime.get(), both(greaterThan(interruptTriggerTime - range)) .and(lessThan(interruptTriggerTime + range))); - assertThat("The readInterruptTimestamp() did not return the correct value (values in seconds)", - getInterruptable().readInterruptTimestamp(), both(greaterThan((interruptTriggerTime - range)/1e6)) + assertThat("The readRisingTimestamp() did not return the correct value (values in seconds)", + getInterruptable().readRisingTimestamp(), both(greaterThan((interruptTriggerTime - range)/1e6)) .and(lessThan((interruptTriggerTime + range)/1e6))); } - + @Test(timeout = 1000) public void testMultipleInterruptsTriggering() throws Exception{ //Given final InterruptCounter counter = new InterruptCounter(); TestInterruptHandlerFunction function = new TestInterruptHandlerFunction(counter); - + //When getInterruptable().requestInterrupts(function); getInterruptable().enableInterrupts(); - + final int fireCount = 50; for(int i = 0; i < fireCount; i ++){ setInterruptLow(); @@ -170,14 +170,14 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { //Then assertEquals("The interrupt did not fire the expected number of times", fireCount, counter.getCount()); } - + /** The timeout length for this test in seconds */ private static final int synchronousTimeout = 5; @Test(timeout = (long)(synchronousTimeout*1e3)) public void testSynchronousInterruptsTriggering(){ //Given getInterruptable().requestInterrupts(); - + final double synchronousDelay = synchronousTimeout/2.; Runnable r = new Runnable(){ @Override @@ -187,32 +187,32 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { setInterruptHigh(); } }; - + //When - + //Note: the long time value is used because doubles can flip if the robot is left running for long enough final long startTimeStamp = Utility.getFPGATime(); new Thread(r).start(); //Delay for twice as long as the timeout so the test should fail first getInterruptable().waitForInterrupt(synchronousTimeout * 2); final long stopTimeStamp = Utility.getFPGATime(); - + //Then //The test will not have timed out and: final double interruptRunTime = (stopTimeStamp - startTimeStamp)*1e-6; assertEquals("The interrupt did not run for the expected amount of time (units in seconds)", synchronousDelay, interruptRunTime, .1); } - - + + @Test(timeout = 2000) public void testDisableStopsInterruptFiring(){ final InterruptCounter counter = new InterruptCounter(); TestInterruptHandlerFunction function = new TestInterruptHandlerFunction(counter); - + //When getInterruptable().requestInterrupts(function); getInterruptable().enableInterrupts(); - + final int fireCount = 50; for(int i = 0; i < fireCount; i ++){ setInterruptLow(); @@ -224,16 +224,16 @@ public abstract class AbstractInterruptTest extends AbstractComsSetup { } getInterruptable().disableInterrupts(); //TestBench.out().println("Finished disabling the robot"); - + for(int i = 0; i < fireCount; i ++){ setInterruptLow(); setInterruptHigh(); //Just wait because the interrupt should not fire Timer.delay(.005); } - + //Then assertEquals("The interrupt did not fire the expected number of times", fireCount, counter.getCount()); } - + } diff --git a/wpilibj/wpilibJavaJNI/lib/CounterJNI.cpp b/wpilibj/wpilibJavaJNI/lib/CounterJNI.cpp index 34f2dedc44..fe4e00955c 100644 --- a/wpilibj/wpilibJavaJNI/lib/CounterJNI.cpp +++ b/wpilibj/wpilibJavaJNI/lib/CounterJNI.cpp @@ -287,40 +287,6 @@ JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_CounterJNI_setCounterSampl COUNTERJNI_LOG(logDEBUG) << "Status = " << *statusPtr; } -/* - * Class: edu_wpi_first_wpilibj_hal_CounterJNI - * Method: startCounter - * Signature: (Ljava/nio/ByteBuffer;Ljava/nio/IntBuffer;)V - */ -JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_CounterJNI_startCounter - (JNIEnv * env, jclass, jobject id, jobject status) -{ - COUNTERJNI_LOG(logDEBUG) << "Calling COUNTERJNI startCounter"; - void ** javaId = (void**)env->GetDirectBufferAddress(id); - COUNTERJNI_LOG(logDEBUG) << "Counter Ptr = " << *javaId; - jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); - COUNTERJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; - startCounter(*javaId, statusPtr); - COUNTERJNI_LOG(logDEBUG) << "Status = " << *statusPtr; -} - -/* - * Class: edu_wpi_first_wpilibj_hal_CounterJNI - * Method: stopCounter - * Signature: (Ljava/nio/ByteBuffer;Ljava/nio/IntBuffer;)V - */ -JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_CounterJNI_stopCounter - (JNIEnv * env, jclass, jobject id, jobject status) -{ - COUNTERJNI_LOG(logDEBUG) << "Calling COUNTERJNI stopCounter"; - void ** javaId = (void**)env->GetDirectBufferAddress(id); - COUNTERJNI_LOG(logDEBUG) << "Counter Ptr = " << *javaId; - jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); - COUNTERJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; - stopCounter(*javaId, statusPtr); - COUNTERJNI_LOG(logDEBUG) << "Status = " << *statusPtr; -} - /* * Class: edu_wpi_first_wpilibj_hal_CounterJNI * Method: resetCounter diff --git a/wpilibj/wpilibJavaJNI/lib/EncoderJNI.cpp b/wpilibj/wpilibJavaJNI/lib/EncoderJNI.cpp index 4f9e3613e5..05c2b073ad 100644 --- a/wpilibj/wpilibJavaJNI/lib/EncoderJNI.cpp +++ b/wpilibj/wpilibJavaJNI/lib/EncoderJNI.cpp @@ -61,40 +61,6 @@ JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_EncoderJNI_freeEncoder ENCODERJNI_LOG(logDEBUG) << "Status = " << *statusPtr; } -/* - * Class: edu_wpi_first_wpilibj_hal_EncoderJNI - * Method: startEncoder - * Signature: (Ljava/nio/ByteBuffer;Ljava/nio/IntBuffer;)V - */ -JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_EncoderJNI_startEncoder - (JNIEnv * env, jclass, jobject id, jobject status) -{ - ENCODERJNI_LOG(logDEBUG) << "Calling ENCODERJNI startEncoder"; - void ** javaId = (void**)env->GetDirectBufferAddress(id); - ENCODERJNI_LOG(logDEBUG) << "Encoder Ptr = " << *javaId; - jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); - ENCODERJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; - startEncoder(*javaId, statusPtr); - ENCODERJNI_LOG(logDEBUG) << "Status = " << *statusPtr; -} - -/* - * Class: edu_wpi_first_wpilibj_hal_EncoderJNI - * Method: stopEncoder - * Signature: (Ljava/nio/ByteBuffer;Ljava/nio/IntBuffer;)V - */ -JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_EncoderJNI_stopEncoder - (JNIEnv * env, jclass, jobject id, jobject status) -{ - ENCODERJNI_LOG(logDEBUG) << "Calling ENCODERJNI stopEncoder"; - void ** javaId = (void**)env->GetDirectBufferAddress(id); - ENCODERJNI_LOG(logDEBUG) << "Encoder Ptr = " << *javaId; - jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); - ENCODERJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; - stopEncoder(*javaId, statusPtr); - ENCODERJNI_LOG(logDEBUG) << "Status = " << *statusPtr; -} - /* * Class: edu_wpi_first_wpilibj_hal_EncoderJNI * Method: resetEncoder diff --git a/wpilibj/wpilibJavaJNI/lib/InterruptJNI.cpp b/wpilibj/wpilibJavaJNI/lib/InterruptJNI.cpp index 6173c8f47c..24786af3ea 100644 --- a/wpilibj/wpilibJavaJNI/lib/InterruptJNI.cpp +++ b/wpilibj/wpilibJavaJNI/lib/InterruptJNI.cpp @@ -8,8 +8,8 @@ TLogLevel interruptJNILogLevel = logERROR; #define INTERRUPTJNI_LOG(level) \ - if (level > interruptJNILogLevel) ; \ - else Log().Get(level) + if (level > interruptJNILogLevel) ; \ + else Log().Get(level) //Used for callback when an interrupt is fired. static JavaVM *jvm; @@ -79,8 +79,8 @@ JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_cleanInterrup * Method: waitForInterrupt * Signature: (Ljava/nio/ByteBuffer;DLjava/nio/IntBuffer;)V */ -JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_waitForInterrupt - (JNIEnv * env, jclass, jobject interrupt_pointer, jdouble timeout, jobject status) +JNIEXPORT int JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_waitForInterrupt + (JNIEnv * env, jclass, jobject interrupt_pointer, jdouble timeout, jboolean ignorePrevious, jobject status) { INTERRUPTJNI_LOG(logDEBUG) << "Calling INTERRUPTJNI waitForInterrupt"; void ** javaId = (void**)env->GetDirectBufferAddress(interrupt_pointer); @@ -88,9 +88,11 @@ JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_waitForInterr jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); INTERRUPTJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; - waitForInterrupt(*javaId, timeout, statusPtr); + int result = waitForInterrupt(*javaId, timeout, ignorePrevious, statusPtr); INTERRUPTJNI_LOG(logDEBUG) << "Status = " << *statusPtr; + + return result; } /* @@ -133,19 +135,39 @@ JNIEXPORT void JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_disableInterr /* * Class: edu_wpi_first_wpilibj_hal_InterruptJNI - * Method: readInterruptTimestamp + * Method: readRisingTimestamp * Signature: (Ljava/nio/ByteBuffer;Ljava/nio/IntBuffer;)D */ -JNIEXPORT jdouble JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_readInterruptTimestamp +JNIEXPORT jdouble JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_readRisingTimestamp (JNIEnv * env, jclass, jobject interrupt_pointer, jobject status) { - INTERRUPTJNI_LOG(logDEBUG) << "Calling INTERRUPTJNI readInterruptTimestamp"; + INTERRUPTJNI_LOG(logDEBUG) << "Calling INTERRUPTJNI readRisingTimestamp"; void ** javaId = (void**)env->GetDirectBufferAddress(interrupt_pointer); INTERRUPTJNI_LOG(logDEBUG) << "Interrupt Ptr = " << *javaId; jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); INTERRUPTJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; - jdouble timeStamp = readInterruptTimestamp(*javaId, statusPtr); + jdouble timeStamp = readRisingTimestamp(*javaId, statusPtr); + + INTERRUPTJNI_LOG(logDEBUG) << "Status = " << *statusPtr; + return timeStamp; +} + +/* + * Class: edu_wpi_first_wpilibj_hal_InterruptJNI + * Method: readFallingTimestamp + * Signature: (Ljava/nio/ByteBuffer;Ljava/nio/IntBuffer;)D + */ +JNIEXPORT jdouble JNICALL Java_edu_wpi_first_wpilibj_hal_InterruptJNI_readFallingTimestamp + (JNIEnv * env, jclass, jobject interrupt_pointer, jobject status) +{ + INTERRUPTJNI_LOG(logDEBUG) << "Calling INTERRUPTJNI readFallingTimestamp"; + void ** javaId = (void**)env->GetDirectBufferAddress(interrupt_pointer); + INTERRUPTJNI_LOG(logDEBUG) << "Interrupt Ptr = " << *javaId; + jint * statusPtr = (jint*)env->GetDirectBufferAddress(status); + INTERRUPTJNI_LOG(logDEBUG) << "Status Ptr = " << statusPtr; + + jdouble timeStamp = readFallingTimestamp(*javaId, statusPtr); INTERRUPTJNI_LOG(logDEBUG) << "Status = " << *statusPtr; return timeStamp;