diff --git a/wpilibc/src/main/native/include/frc/SPI.h b/wpilibc/src/main/native/include/frc/SPI.h
index 5b170bac23..d50214574d 100644
--- a/wpilibc/src/main/native/include/frc/SPI.h
+++ b/wpilibc/src/main/native/include/frc/SPI.h
@@ -62,7 +62,7 @@ class SPI {
    */
   explicit SPI(Port port);
 
-  virtual ~SPI();
+  ~SPI();
 
   SPI(SPI&&) = default;
   SPI& operator=(SPI&&) = default;
@@ -116,7 +116,7 @@ class SPI {
    * If not running in output only mode, also saves the data received
    * on the CIPO input during the transfer into the receive FIFO.
    */
-  virtual int Write(uint8_t* data, int size);
+  int Write(uint8_t* data, int size);
 
   /**
    * Read a word from the receive FIFO.
@@ -133,7 +133,7 @@ class SPI {
    * @param dataReceived Buffer to receive data from the device
    * @param size         The length of the transaction, in bytes
    */
-  virtual int Read(bool initiate, uint8_t* dataReceived, int size);
+  int Read(bool initiate, uint8_t* dataReceived, int size);
 
   /**
    * Perform a simultaneous read/write transaction with the device
@@ -142,7 +142,7 @@ class SPI {
    * @param dataReceived Buffer to receive data from the device
    * @param size         The length of the transaction, in bytes
    */
-  virtual int Transaction(uint8_t* dataToSend, uint8_t* dataReceived, int size);
+  int Transaction(uint8_t* dataToSend, uint8_t* dataReceived, int size);
 
   /**
    * Initialize automatic SPI transfer engine.