diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h b/ni-libraries/include/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h index 99a0191ee2..ff2b5df4b0 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/RoboRIO_FRC_ChipObject_Aliases.h @@ -1,9 +1,9 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __RoboRIO_FRC_ChipObject_Aliases_h__ -#define __RoboRIO_FRC_ChipObject_Aliases_h__ - -#define nRoboRIO_FPGANamespace nFRC_2017_17_0_2 - -#endif // __RoboRIO_FRC_ChipObject_Aliases_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __RoboRIO_FRC_ChipObject_Aliases_h__ +#define __RoboRIO_FRC_ChipObject_Aliases_h__ + +#define nRoboRIO_FPGANamespace nFRC_2017_17_0_2 + +#endif // __RoboRIO_FRC_ChipObject_Aliases_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h b/ni-libraries/include/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h index 7bf96a82c7..09f8b3b9d5 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/fpgainterfacecapi/NiFpga.h @@ -1,2807 +1,2807 @@ -/* - * FPGA Interface C API 16.0 header file. - * - * Copyright (c) 2016, - * National Instruments Corporation. - * All rights reserved. - */ - -#ifndef __NiFpga_h__ -#define __NiFpga_h__ - -/* - * Determine platform details. - */ -#if defined(_M_IX86) \ - || defined(_M_X64) \ - || defined(_M_AMD64) \ - || defined(i386) \ - || defined(__i386) \ - || defined(__i386__) \ - || defined(__i486__) \ - || defined(__i586__) \ - || defined(__i686__) \ - || defined(__amd64__) \ - || defined(__amd64) \ - || defined(__x86_64__) \ - || defined(__x86_64) \ - || defined(__IA32__) \ - || defined(_X86_) \ - || defined(__THW_INTEL__) \ - || defined(__I86__) \ - || defined(__INTEL__) \ - || defined(__X86__) \ - || defined(__386__) \ - || defined(__I86__) \ - || defined(M_I386) \ - || defined(M_I86) \ - || defined(_M_I386) \ - || defined(_M_I86) - #if defined(_WIN32) \ - || defined(_WIN64) \ - || defined(__WIN32__) \ - || defined(__TOS_WIN__) \ - || defined(__WINDOWS__) \ - || defined(_WINDOWS) \ - || defined(__WINDOWS_386__) \ - || defined(__CYGWIN__) - /* Either Windows or Phar Lap ETS. */ - #define NiFpga_Windows 1 - #elif defined(__linux__) \ - || defined(__linux) \ - || defined(linux) \ - || defined(__gnu_linux__) - #define NiFpga_Linux 1 - #elif defined(__APPLE__) && defined(__MACH__) - #define NiFpga_MacOsX 1 - #else - #error Unsupported OS. - #endif -#elif defined(__powerpc) \ - || defined(__powerpc__) \ - || defined(__POWERPC__) \ - || defined(__ppc__) \ - || defined(__PPC) \ - || defined(_M_PPC) \ - || defined(_ARCH_PPC) \ - || defined(__PPC__) \ - || defined(__ppc) - #if defined(__vxworks) - #define NiFpga_VxWorks 1 - #else - #error Unsupported OS. - #endif -#elif defined(__arm__) \ - || defined(__thumb__) \ - || defined(__TARGET_ARCH_ARM) \ - || defined(__TARGET_ARCH_THUMB) \ - || defined(_ARM) \ - || defined(_M_ARM) \ - || defined(_M_ARMT) -#if defined(__linux__) \ - || defined(__linux) \ - || defined(linux) \ - || defined(__gnu_linux__) - #define NiFpga_Linux 1 -#else - #error Unsupported OS. - #endif -#else - #error Unsupported architecture. -#endif - -/* - * Determine compiler. - */ -#if defined(_MSC_VER) - #define NiFpga_Msvc 1 -#elif defined(__GNUC__) - #define NiFpga_Gcc 1 -#elif defined(_CVI_) && !defined(_TPC_) - #define NiFpga_Cvi 1 - /* Enables CVI Library Protection Errors. */ - #pragma EnableLibraryRuntimeChecking -#else - /* Unknown compiler. */ -#endif - -/* - * Determine compliance with different C/C++ language standards. - */ -#if defined(__cplusplus) - #define NiFpga_Cpp 1 - #if __cplusplus >= 199707L - #define NiFpga_Cpp98 1 - #if __cplusplus >= 201103L - #define NiFpga_Cpp11 1 - #endif - #endif -#endif -#if defined(__STDC__) - #define NiFpga_C89 1 - #if defined(__STDC_VERSION__) - #define NiFpga_C90 1 - #if __STDC_VERSION__ >= 199409L - #define NiFpga_C94 1 - #if __STDC_VERSION__ >= 199901L - #define NiFpga_C99 1 - #if __STDC_VERSION__ >= 201112L - #define NiFpga_C11 1 - #endif - #endif - #endif - #endif -#endif - -/* - * Determine ability to inline functions. - */ -#if NiFpga_Cpp || NiFpga_C99 - /* The inline keyword exists in C++ and C99. */ - #define NiFpga_Inline inline -#elif NiFpga_Msvc - /* Visual C++ (at least since 6.0) also supports an alternate keyword. */ - #define NiFpga_Inline __inline -#elif NiFpga_Gcc - /* GCC (at least since 2.95.2) also supports an alternate keyword. */ - #define NiFpga_Inline __inline__ -#elif !defined(NiFpga_Inline) - /* - * Disable inlining if inline support is unknown. To manually enable - * inlining, #define the following macro before #including NiFpga.h: - * - * #define NiFpga_Inline inline - */ - #define NiFpga_Inline -#endif - -/* - * Define exact-width integer types, if they have not already been defined. - */ -#if NiFpga_ExactWidthIntegerTypesDefined \ - || defined(_STDINT) \ - || defined(_STDINT_H) \ - || defined(_STDINT_H_) \ - || defined(_INTTYPES_H) \ - || defined(_INTTYPES_H_) \ - || defined(_SYS_STDINT_H) \ - || defined(_SYS_STDINT_H_) \ - || defined(_SYS_INTTYPES_H) \ - || defined(_SYS_INTTYPES_H_) \ - || defined(_STDINT_H_INCLUDED) \ - || defined(_MSC_STDINT_H_) \ - || defined(_PSTDINT_H_INCLUDED) - /* Assume that exact-width integer types have already been defined. */ -#elif NiFpga_VxWorks - /* VxWorks (at least 6.3 and earlier) did not have stdint.h. */ - #include -#elif NiFpga_C99 \ - || NiFpga_Gcc /* GCC (at least since 3.0) has a stdint.h. */ \ - || defined(HAVE_STDINT_H) - /* Assume that stdint.h can be included. */ - #include -#elif NiFpga_Msvc \ - || NiFpga_Cvi - /* Manually define exact-width integer types. */ - typedef signed char int8_t; - typedef unsigned char uint8_t; - typedef short int16_t; - typedef unsigned short uint16_t; - typedef int int32_t; - typedef unsigned int uint32_t; - typedef __int64 int64_t; - typedef unsigned __int64 uint64_t; -#else - /* - * Exact-width integer types must be defined by the user, and the following - * macro must be #defined, before #including NiFpga.h: - * - * #define NiFpga_ExactWidthIntegerTypesDefined 1 - */ - #error Exact-width integer types must be defined by the user. See comment. -#endif - -/* Included for definition of size_t. */ -#include - -#if NiFpga_Cpp -extern "C" -{ -#endif - -/** - * A boolean value; either NiFpga_False or NiFpga_True. - */ -typedef uint8_t NiFpga_Bool; - -/** - * Represents a false condition. - */ -static const NiFpga_Bool NiFpga_False = 0; - -/** - * Represents a true condition. - */ -static const NiFpga_Bool NiFpga_True = 1; - -/** - * Represents the resulting status of a function call through its return value. - * 0 is success, negative values are errors, and positive values are warnings. - */ -typedef int32_t NiFpga_Status; - -/** - * No errors or warnings. - */ -static const NiFpga_Status NiFpga_Status_Success = 0; - -/** - * The timeout expired before the FIFO operation could complete. - */ -static const NiFpga_Status NiFpga_Status_FifoTimeout = -50400; - -/** - * No transfer is in progress because the transfer was aborted by the client. - * The operation could not be completed as specified. - */ -static const NiFpga_Status NiFpga_Status_TransferAborted = -50405; - -/** - * A memory allocation failed. Try again after rebooting. - */ -static const NiFpga_Status NiFpga_Status_MemoryFull = -52000; - -/** - * An unexpected software error occurred. - */ -static const NiFpga_Status NiFpga_Status_SoftwareFault = -52003; - -/** - * A parameter to a function was not valid. This could be a NULL pointer, a bad - * value, etc. - */ -static const NiFpga_Status NiFpga_Status_InvalidParameter = -52005; - -/** - * A required resource was not found. The NiFpga.* library, the RIO resource, or - * some other resource may be missing. - */ -static const NiFpga_Status NiFpga_Status_ResourceNotFound = -52006; - -/** - * A required resource was not properly initialized. This could occur if - * NiFpga_Initialize was not called or a required NiFpga_IrqContext was not - * reserved. - */ -static const NiFpga_Status NiFpga_Status_ResourceNotInitialized = -52010; - -/** - * The FPGA is already running. - */ -static const NiFpga_Status NiFpga_Status_FpgaAlreadyRunning = -61003; - -/** - * An error occurred downloading the VI to the FPGA device. Verify that - * the target is connected and powered and that the resource of the target - * is properly configured. - */ -static const NiFpga_Status NiFpga_Status_DownloadError = -61018; - -/** - * The bitfile was not compiled for the specified resource's device type. - */ -static const NiFpga_Status NiFpga_Status_DeviceTypeMismatch = -61024; - -/** - * An error was detected in the communication between the host computer and the - * FPGA target. - */ -static const NiFpga_Status NiFpga_Status_CommunicationTimeout = -61046; - -/** - * The timeout expired before any of the IRQs were asserted. - */ -static const NiFpga_Status NiFpga_Status_IrqTimeout = -61060; - -/** - * The specified bitfile is invalid or corrupt. - */ -static const NiFpga_Status NiFpga_Status_CorruptBitfile = -61070; - -/** - * The requested FIFO depth is invalid. It is either 0 or an amount not - * supported by the hardware. - */ -static const NiFpga_Status NiFpga_Status_BadDepth = -61072; - -/** - * The number of FIFO elements is invalid. Either the number is greater than the - * depth of the host memory DMA FIFO, or more elements were requested for - * release than had been acquired. - */ -static const NiFpga_Status NiFpga_Status_BadReadWriteCount = -61073; - -/** - * A hardware clocking error occurred. A derived clock lost lock with its base - * clock during the execution of the LabVIEW FPGA VI. If any base clocks with - * derived clocks are referencing an external source, make sure that the - * external source is connected and within the supported frequency, jitter, - * accuracy, duty cycle, and voltage specifications. Also verify that the - * characteristics of the base clock match the configuration specified in the - * FPGA Base Clock Properties. If all base clocks with derived clocks are - * generated from free-running, on-board sources, please contact National - * Instruments technical support at ni.com/support. - */ -static const NiFpga_Status NiFpga_Status_ClockLostLock = -61083; - -/** - * The operation could not be performed because the FPGA is busy. Stop all - * activities on the FPGA before requesting this operation. If the target is in - * Scan Interface programming mode, put it in FPGA Interface programming mode. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusy = -61141; - -/** - * The operation could not be performed because the FPGA is busy operating in - * FPGA Interface C API mode. Stop all activities on the FPGA before requesting - * this operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterfaceCApi = -61200; - -/** - * The chassis is in Scan Interface programming mode. In order to run FPGA VIs, - * you must go to the chassis properties page, select FPGA programming mode, and - * deploy settings. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyScanInterface = -61201; - -/** - * The operation could not be performed because the FPGA is busy operating in - * FPGA Interface mode. Stop all activities on the FPGA before requesting this - * operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterface = -61202; - -/** - * The operation could not be performed because the FPGA is busy operating in - * Interactive mode. Stop all activities on the FPGA before requesting this - * operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyInteractive = -61203; - -/** - * The operation could not be performed because the FPGA is busy operating in - * Emulation mode. Stop all activities on the FPGA before requesting this - * operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyEmulation = -61204; - -/** - * LabVIEW FPGA does not support the Reset method for bitfiles that allow - * removal of implicit enable signals in single-cycle Timed Loops. - */ -static const NiFpga_Status NiFpga_Status_ResetCalledWithImplicitEnableRemoval = -61211; - -/** - * LabVIEW FPGA does not support the Abort method for bitfiles that allow - * removal of implicit enable signals in single-cycle Timed Loops. - */ -static const NiFpga_Status NiFpga_Status_AbortCalledWithImplicitEnableRemoval = -61212; - -/** - * LabVIEW FPGA does not support Close and Reset if Last Reference for bitfiles - * that allow removal of implicit enable signals in single-cycle Timed Loops. - * Pass the NiFpga_CloseAttribute_NoResetIfLastSession attribute to NiFpga_Close - * instead of 0. - */ -static const NiFpga_Status NiFpga_Status_CloseAndResetCalledWithImplicitEnableRemoval = -61213; - -/** - * For bitfiles that allow removal of implicit enable signals in single-cycle - * Timed Loops, LabVIEW FPGA does not support this method prior to running the - * bitfile. - */ -static const NiFpga_Status NiFpga_Status_ImplicitEnableRemovalButNotYetRun = -61214; - -/** - * Bitfiles that allow removal of implicit enable signals in single-cycle Timed - * Loops can run only once. Download the bitfile again before re-running the VI. - */ -static const NiFpga_Status NiFpga_Status_RunAfterStoppedCalledWithImplicitEnableRemoval = -61215; - -/** - * A gated clock has violated the handshaking protocol. If you are using - * external gated clocks, ensure that they follow the required clock gating - * protocol. If you are generating your clocks internally, please contact - * National Instruments Technical Support. - */ -static const NiFpga_Status NiFpga_Status_GatedClockHandshakingViolation = -61216; - -/** - * The number of elements requested must be less than or equal to the number of - * unacquired elements left in the host memory DMA FIFO. There are currently - * fewer unacquired elements left in the FIFO than are being requested. Release - * some acquired elements before acquiring more elements. - */ -static const NiFpga_Status NiFpga_Status_ElementsNotPermissibleToBeAcquired = -61219; - -/** - * The operation could not be performed because the FPGA is in configuration or - * discovery mode. Wait for configuration or discovery to complete and retry - * your operation. - */ -static const NiFpga_Status NiFpga_Status_FpgaBusyConfiguration = -61252; - -/** - * LabVIEW FPGA does not support Close and Reset if Last Reference for bitfiles - * that do not support Reset. Pass the - * NiFpga_CloseAttribute_NoResetIfLastSession attribute to NiFpga_Close instead - * of 0. - */ -static const NiFpga_Status NiFpga_Status_CloseAndResetCalledWithResetNotSupported = -61253; - -/** - * An unexpected internal error occurred. - */ -static const NiFpga_Status NiFpga_Status_InternalError = -61499; - -/** - * The NI-RIO driver was unable to allocate memory for a FIFO. This can happen - * when the combined depth of all DMA FIFOs exceeds the maximum depth for the - * controller, or when the controller runs out of system memory. You may be able - * to reconfigure the controller with a greater maximum FIFO depth. For more - * information, refer to the NI KnowledgeBase article 65OF2ERQ. - */ -static const NiFpga_Status NiFpga_Status_TotalDmaFifoDepthExceeded = -63003; - -/** - * Access to the remote system was denied. Use MAX to check the Remote Device - * Access settings under Software>>NI-RIO>>NI-RIO Settings on the remote system. - */ -static const NiFpga_Status NiFpga_Status_AccessDenied = -63033; - -/** - * The NI-RIO software on the host is not compatible with the software on the - * target. Upgrade the NI-RIO software on the host in order to connect to this - * target. - */ -static const NiFpga_Status NiFpga_Status_HostVersionMismatch = -63038; - -/** - * A connection could not be established to the specified remote device. Ensure - * that the device is on and accessible over the network, that NI-RIO software - * is installed, and that the RIO server is running and properly configured. - */ -static const NiFpga_Status NiFpga_Status_RpcConnectionError = -63040; - -/** - * The RPC session is invalid. The target may have reset or been rebooted. Check - * the network connection and retry the operation. - */ -static const NiFpga_Status NiFpga_Status_RpcSessionError = -63043; - -/** - * The operation could not complete because another session is accessing the - * FIFO. Close the other session and retry. - */ -static const NiFpga_Status NiFpga_Status_FifoReserved = -63082; - -/** - * A Configure FIFO, Stop FIFO, Read FIFO, or Write FIFO function was called - * while the host had acquired elements of the FIFO. Release all acquired - * elements before configuring, stopping, reading, or writing. - */ -static const NiFpga_Status NiFpga_Status_FifoElementsCurrentlyAcquired = -63083; - -/** - * A function was called using a misaligned address. The address must be a - * multiple of the size of the datatype. - */ -static const NiFpga_Status NiFpga_Status_MisalignedAccess = -63084; - -/** - * The FPGA Read/Write Control Function is accessing a control or indicator - * with data that exceeds the maximum size supported on the current target. - * Refer to the hardware documentation for the limitations on data types for - * this target. - */ -static const NiFpga_Status NiFpga_Status_ControlOrIndicatorTooLarge = -63085; - -/** - * A valid .lvbitx bitfile is required. If you are using a valid .lvbitx - * bitfile, the bitfile may not be compatible with the software you are using. - * Determine which version of LabVIEW was used to make the bitfile, update your - * software to that version or later, and try again. - */ -static const NiFpga_Status NiFpga_Status_BitfileReadError = -63101; - -/** - * The specified signature does not match the signature of the bitfile. If the - * bitfile has been recompiled, regenerate the C API and rebuild the - * application. - */ -static const NiFpga_Status NiFpga_Status_SignatureMismatch = -63106; - -/** - * The bitfile you are trying to use is incompatible with the version - * of NI-RIO installed on the target and/or host. Update the version - * of NI-RIO on the target and/or host to the same version (or later) - * used to compile the bitfile. Alternatively, recompile the bitfile - * with the same version of NI-RIO that is currently installed on the - * target and/or host. - */ -static const NiFpga_Status NiFpga_Status_IncompatibleBitfile = -63107; - -/** - * A hardware failure has occurred. The operation could not be completed as - * specified. - */ -static const NiFpga_Status NiFpga_Status_HardwareFault = -63150; - -/** - * Either the supplied resource name is invalid as a RIO resource name, or the - * device was not found. Use MAX to find the proper resource name for the - * intended device. - */ -static const NiFpga_Status NiFpga_Status_InvalidResourceName = -63192; - -/** - * The requested feature is not supported. - */ -static const NiFpga_Status NiFpga_Status_FeatureNotSupported = -63193; - -/** - * The NI-RIO software on the target system is not compatible with this - * software. Upgrade the NI-RIO software on the target system. - */ -static const NiFpga_Status NiFpga_Status_VersionMismatch = -63194; - -/** - * The session is invalid or has been closed. - */ -static const NiFpga_Status NiFpga_Status_InvalidSession = -63195; - -/** - * The maximum number of open FPGA sessions has been reached. Close some open - * sessions. - */ -static const NiFpga_Status NiFpga_Status_OutOfHandles = -63198; - -/** - * Tests whether a status is an error. - * - * @param status status to check for an error - * @return whether the status was an error - */ -static NiFpga_Inline NiFpga_Bool NiFpga_IsError(const NiFpga_Status status) -{ - return status < NiFpga_Status_Success ? NiFpga_True : NiFpga_False; -} - -/** - * Tests whether a status is not an error. Success and warnings are not errors. - * - * @param status status to check for an error - * @return whether the status was a success or warning - */ -static NiFpga_Inline NiFpga_Bool NiFpga_IsNotError(const NiFpga_Status status) -{ - return status >= NiFpga_Status_Success ? NiFpga_True : NiFpga_False; -} - -/** - * Conditionally sets the status to a new value. The previous status is - * preserved unless the new status is more of an error, which means that - * warnings and errors overwrite successes, and errors overwrite warnings. New - * errors do not overwrite older errors, and new warnings do not overwrite - * older warnings. - * - * @param status status to conditionally set - * @param newStatus new status value that may be set - * @return the resulting status - */ -static NiFpga_Inline NiFpga_Status NiFpga_MergeStatus( - NiFpga_Status* const status, - const NiFpga_Status newStatus) -{ - if (!status) - return NiFpga_Status_InvalidParameter; - if (NiFpga_IsNotError(*status) - && (*status == NiFpga_Status_Success || NiFpga_IsError(newStatus))) - *status = newStatus; - return *status; -} - -/** - * This macro evaluates the expression only if the status is not an error. The - * expression must evaluate to an NiFpga_Status, such as a call to any NiFpga_* - * function, because the status will be set to the returned status if the - * expression is evaluated. - * - * You can use this macro to mimic status chaining in LabVIEW, where the status - * does not have to be explicitly checked after each call. Such code may look - * like the following example. - * - * NiFpga_Status status = NiFpga_Status_Success; - * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); - * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); - * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); - * - * @param status status to check for an error - * @param expression expression to call if the incoming status is not an error - */ -#define NiFpga_IfIsNotError(status, expression) \ - if (NiFpga_IsNotError(status)) \ - NiFpga_MergeStatus(&status, (expression)); \ - -/** - * You must call this function before all other function calls. This function - * loads the NiFpga library so that all the other functions will work. If this - * function succeeds, you must call NiFpga_Finalize after all other function - * calls. - * - * @warning This function is not thread safe. - * - * @return result of the call - */ -NiFpga_Status NiFpga_Initialize(void); - -/** - * You must call this function after all other function calls if - * NiFpga_Initialize succeeds. This function unloads the NiFpga library. - * - * @warning This function is not thread safe. - * - * @return result of the call - */ -NiFpga_Status NiFpga_Finalize(void); - -/** - * A handle to an FPGA session. - */ -typedef uint32_t NiFpga_Session; - -/** - * Attributes that NiFpga_Open accepts. - */ -typedef enum -{ - NiFpga_OpenAttribute_NoRun = 1 -} NiFpga_OpenAttribute; - -/** - * Opens a session to the FPGA. This call ensures that the contents of the - * bitfile are programmed to the FPGA. The FPGA runs unless the - * NiFpga_OpenAttribute_NoRun attribute is used. - * - * Because different operating systems have different default current working - * directories for applications, you must pass an absolute path for the bitfile - * parameter. If you pass only the filename instead of an absolute path, the - * operating system may not be able to locate the bitfile. For example, the - * default current working directories are C:\ni-rt\system\ for Phar Lap ETS and - * /c/ for VxWorks. Because the generated *_Bitfile constant is a #define to a - * string literal, you can use C/C++ string-literal concatenation to form an - * absolute path. For example, if the bitfile is in the root directory of a - * Phar Lap ETS system, pass the following for the bitfile parameter. - * - * "C:\\" NiFpga_MyApplication_Bitfile - * - * @param bitfile path to the bitfile - * @param signature signature of the bitfile - * @param resource RIO resource string to open ("RIO0" or "rio://mysystem/RIO") - * @param attribute bitwise OR of any NiFpga_OpenAttributes, or 0 - * @param session outputs the session handle, which must be closed when no - * longer needed - * @return result of the call - */ -NiFpga_Status NiFpga_Open(const char* bitfile, - const char* signature, - const char* resource, - uint32_t attribute, - NiFpga_Session* session); - -/** - * Attributes that NiFpga_Close accepts. - */ -typedef enum -{ - NiFpga_CloseAttribute_NoResetIfLastSession = 1 -} NiFpga_CloseAttribute; - -/** - * Closes the session to the FPGA. The FPGA resets unless either another session - * is still open or you use the NiFpga_CloseAttribute_NoResetIfLastSession - * attribute. - * - * @param session handle to a currently open session - * @param attribute bitwise OR of any NiFpga_CloseAttributes, or 0 - * @return result of the call - */ -NiFpga_Status NiFpga_Close(NiFpga_Session session, - uint32_t attribute); - -/** - * Attributes that NiFpga_Run accepts. - */ -typedef enum -{ - NiFpga_RunAttribute_WaitUntilDone = 1 -} NiFpga_RunAttribute; - -/** - * Runs the FPGA VI on the target. If you use NiFpga_RunAttribute_WaitUntilDone, - * NiFpga_Run blocks the thread until the FPGA finishes running. - * - * @param session handle to a currently open session - * @param attribute bitwise OR of any NiFpga_RunAttributes, or 0 - * @return result of the call - */ -NiFpga_Status NiFpga_Run(NiFpga_Session session, - uint32_t attribute); - -/** - * Aborts the FPGA VI. - * - * @param session handle to a currently open session - * @return result of the call - */ -NiFpga_Status NiFpga_Abort(NiFpga_Session session); - -/** - * Resets the FPGA VI. - * - * @param session handle to a currently open session - * @return result of the call - */ -NiFpga_Status NiFpga_Reset(NiFpga_Session session); - -/** - * Re-downloads the FPGA bitstream to the target. - * - * @param session handle to a currently open session - * @return result of the call - */ -NiFpga_Status NiFpga_Download(NiFpga_Session session); - -/** - * Reads a boolean value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadBool(NiFpga_Session session, - uint32_t indicator, - NiFpga_Bool* value); - -/** - * Reads a signed 8-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI8(NiFpga_Session session, - uint32_t indicator, - int8_t* value); - -/** - * Reads an unsigned 8-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU8(NiFpga_Session session, - uint32_t indicator, - uint8_t* value); - -/** - * Reads a signed 16-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI16(NiFpga_Session session, - uint32_t indicator, - int16_t* value); - -/** - * Reads an unsigned 16-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU16(NiFpga_Session session, - uint32_t indicator, - uint16_t* value); - -/** - * Reads a signed 32-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI32(NiFpga_Session session, - uint32_t indicator, - int32_t* value); - -/** - * Reads an unsigned 32-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU32(NiFpga_Session session, - uint32_t indicator, - uint32_t* value); - -/** - * Reads a signed 64-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadI64(NiFpga_Session session, - uint32_t indicator, - int64_t* value); - -/** - * Reads an unsigned 64-bit integer value from a given indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadU64(NiFpga_Session session, - uint32_t indicator, - uint64_t* value); - -/** - * Reads a single-precision floating-point value from a given indicator or - * control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadSgl(NiFpga_Session session, - uint32_t indicator, - float* value); - -/** - * Reads a double-precision floating-point value from a given indicator or - * control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param value outputs the value that was read - * @return result of the call - */ -NiFpga_Status NiFpga_ReadDbl(NiFpga_Session session, - uint32_t indicator, - double* value); - -/** - * Writes a boolean value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteBool(NiFpga_Session session, - uint32_t control, - NiFpga_Bool value); - -/** - * Writes a signed 8-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI8(NiFpga_Session session, - uint32_t control, - int8_t value); - -/** - * Writes an unsigned 8-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU8(NiFpga_Session session, - uint32_t control, - uint8_t value); - -/** - * Writes a signed 16-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI16(NiFpga_Session session, - uint32_t control, - int16_t value); - -/** - * Writes an unsigned 16-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU16(NiFpga_Session session, - uint32_t control, - uint16_t value); - -/** - * Writes a signed 32-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI32(NiFpga_Session session, - uint32_t control, - int32_t value); - -/** - * Writes an unsigned 32-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU32(NiFpga_Session session, - uint32_t control, - uint32_t value); - -/** - * Writes a signed 64-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteI64(NiFpga_Session session, - uint32_t control, - int64_t value); - -/** - * Writes an unsigned 64-bit integer value to a given control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteU64(NiFpga_Session session, - uint32_t control, - uint64_t value); - -/** - * Writes a single-precision floating-point value to a given control or - * indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteSgl(NiFpga_Session session, - uint32_t control, - float value); - -/** - * Writes a double-precision floating-point value to a given control or - * indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param value value to write - * @return result of the call - */ -NiFpga_Status NiFpga_WriteDbl(NiFpga_Session session, - uint32_t control, - double value); - -/** - * Reads an entire array of boolean values from a given array indicator or - * control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayBool(NiFpga_Session session, - uint32_t indicator, - NiFpga_Bool* array, - size_t size); - -/** - * Reads an entire array of signed 8-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI8(NiFpga_Session session, - uint32_t indicator, - int8_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 8-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU8(NiFpga_Session session, - uint32_t indicator, - uint8_t* array, - size_t size); - -/** - * Reads an entire array of signed 16-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI16(NiFpga_Session session, - uint32_t indicator, - int16_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 16-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU16(NiFpga_Session session, - uint32_t indicator, - uint16_t* array, - size_t size); - -/** - * Reads an entire array of signed 32-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI32(NiFpga_Session session, - uint32_t indicator, - int32_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 32-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU32(NiFpga_Session session, - uint32_t indicator, - uint32_t* array, - size_t size); - -/** - * Reads an entire array of signed 64-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayI64(NiFpga_Session session, - uint32_t indicator, - int64_t* array, - size_t size); - -/** - * Reads an entire array of unsigned 64-bit integer values from a given array - * indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayU64(NiFpga_Session session, - uint32_t indicator, - uint64_t* array, - size_t size); - -/** - * Reads an entire array of single-precision floating-point values from a - * given array indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArraySgl(NiFpga_Session session, - uint32_t indicator, - float* array, - size_t size); - -/** - * Reads an entire array of double-precision floating-point values from a - * given array indicator or control. - * - * @warning The size passed must be the exact number of elements in the - * indicator or control. - * - * @param session handle to a currently open session - * @param indicator indicator or control from which to read - * @param array outputs the entire array that was read - * @param size exact number of elements in the indicator or control - * @return result of the call - */ -NiFpga_Status NiFpga_ReadArrayDbl(NiFpga_Session session, - uint32_t indicator, - double* array, - size_t size); - -/** - * Writes an entire array of boolean values to a given array control or - * indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayBool(NiFpga_Session session, - uint32_t control, - const NiFpga_Bool* array, - size_t size); - -/** - * Writes an entire array of signed 8-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI8(NiFpga_Session session, - uint32_t control, - const int8_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 8-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU8(NiFpga_Session session, - uint32_t control, - const uint8_t* array, - size_t size); - -/** - * Writes an entire array of signed 16-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI16(NiFpga_Session session, - uint32_t control, - const int16_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 16-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU16(NiFpga_Session session, - uint32_t control, - const uint16_t* array, - size_t size); - -/** - * Writes an entire array of signed 32-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI32(NiFpga_Session session, - uint32_t control, - const int32_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 32-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU32(NiFpga_Session session, - uint32_t control, - const uint32_t* array, - size_t size); - -/** - * Writes an entire array of signed 64-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayI64(NiFpga_Session session, - uint32_t control, - const int64_t* array, - size_t size); - -/** - * Writes an entire array of unsigned 64-bit integer values to a given array - * control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayU64(NiFpga_Session session, - uint32_t control, - const uint64_t* array, - size_t size); - -/** - * Writes an entire array of single-precision floating-point values to a given - * array control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArraySgl(NiFpga_Session session, - uint32_t control, - const float* array, - size_t size); - -/** - * Writes an entire array of double-precision floating-point values to a given - * array control or indicator. - * - * @warning The size passed must be the exact number of elements in the - * control or indicator. - * - * @param session handle to a currently open session - * @param control control or indicator to which to write - * @param array entire array to write - * @param size exact number of elements in the control or indicator - * @return result of the call - */ -NiFpga_Status NiFpga_WriteArrayDbl(NiFpga_Session session, - uint32_t control, - const double* array, - size_t size); - -/** - * Enumeration of all 32 possible IRQs. Multiple IRQs can be bitwise ORed - * together like this: - * - * NiFpga_Irq_3 | NiFpga_Irq_23 - */ -typedef enum -{ - NiFpga_Irq_0 = 1 << 0, - NiFpga_Irq_1 = 1 << 1, - NiFpga_Irq_2 = 1 << 2, - NiFpga_Irq_3 = 1 << 3, - NiFpga_Irq_4 = 1 << 4, - NiFpga_Irq_5 = 1 << 5, - NiFpga_Irq_6 = 1 << 6, - NiFpga_Irq_7 = 1 << 7, - NiFpga_Irq_8 = 1 << 8, - NiFpga_Irq_9 = 1 << 9, - NiFpga_Irq_10 = 1 << 10, - NiFpga_Irq_11 = 1 << 11, - NiFpga_Irq_12 = 1 << 12, - NiFpga_Irq_13 = 1 << 13, - NiFpga_Irq_14 = 1 << 14, - NiFpga_Irq_15 = 1 << 15, - NiFpga_Irq_16 = 1 << 16, - NiFpga_Irq_17 = 1 << 17, - NiFpga_Irq_18 = 1 << 18, - NiFpga_Irq_19 = 1 << 19, - NiFpga_Irq_20 = 1 << 20, - NiFpga_Irq_21 = 1 << 21, - NiFpga_Irq_22 = 1 << 22, - NiFpga_Irq_23 = 1 << 23, - NiFpga_Irq_24 = 1 << 24, - NiFpga_Irq_25 = 1 << 25, - NiFpga_Irq_26 = 1 << 26, - NiFpga_Irq_27 = 1 << 27, - NiFpga_Irq_28 = 1 << 28, - NiFpga_Irq_29 = 1 << 29, - NiFpga_Irq_30 = 1 << 30, - NiFpga_Irq_31 = 1U << 31 -} NiFpga_Irq; - -/** - * Represents an infinite timeout. - */ -static const uint32_t NiFpga_InfiniteTimeout = 0xFFFFFFFF; - -/** - * See NiFpga_ReserveIrqContext for more information. - */ -typedef void* NiFpga_IrqContext; - -/** - * IRQ contexts are single-threaded; only one thread can wait with a - * particular context at any given time. To minimize jitter when first - * waiting on IRQs, reserve as many contexts as the application - * requires. - * - * If a context is successfully reserved (the returned status is not an error), - * it must be unreserved later. Otherwise a memory leak will occur. - * - * @param session handle to a currently open session - * @param context outputs the IRQ context - * @return result of the call - */ -NiFpga_Status NiFpga_ReserveIrqContext(NiFpga_Session session, - NiFpga_IrqContext* context); - -/** - * Unreserves an IRQ context obtained from NiFpga_ReserveIrqContext. - * - * @param session handle to a currently open session - * @param context IRQ context to unreserve - * @return result of the call - */ -NiFpga_Status NiFpga_UnreserveIrqContext(NiFpga_Session session, - NiFpga_IrqContext context); - -/** - * This is a blocking function that stops the calling thread until the - * FPGA asserts any IRQ in the irqs parameter, or until the function - * call times out. Before calling this function, use - * NiFpga_ReserveIrqContext to reserve an IRQ context. No other - * threads can use the same context when this function is called. - * - * You can use the irqsAsserted parameter to determine which IRQs were asserted - * for each function call. - * - * @param session handle to a currently open session - * @param context IRQ context with which to wait - * @param irqs bitwise OR of NiFpga_Irqs - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param irqsAsserted if non-NULL, outputs bitwise OR of IRQs that were - * asserted - * @param timedOut if non-NULL, outputs whether the timeout expired - * @return result of the call - */ -NiFpga_Status NiFpga_WaitOnIrqs(NiFpga_Session session, - NiFpga_IrqContext context, - uint32_t irqs, - uint32_t timeout, - uint32_t* irqsAsserted, - NiFpga_Bool* timedOut); - -/** - * Acknowledges an IRQ or set of IRQs. - * - * @param session handle to a currently open session - * @param irqs bitwise OR of NiFpga_Irqs - * @return result of the call - */ -NiFpga_Status NiFpga_AcknowledgeIrqs(NiFpga_Session session, - uint32_t irqs); - -/** - * Specifies the depth of the host memory part of the DMA FIFO. This method is - * optional. In order to see the actual depth configured, use - * NiFpga_ConfigureFifo2. - * - * @param session handle to a currently open session - * @param fifo FIFO to configure - * @param depth requested number of elements in the host memory part of the - * DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ConfigureFifo(NiFpga_Session session, - uint32_t fifo, - size_t depth); - -/** - * Specifies the depth of the host memory part of the DMA FIFO. This method is - * optional. - * - * @param session handle to a currently open session - * @param fifo FIFO to configure - * @param requestedDepth requested number of elements in the host memory part - * of the DMA FIFO - * @param actualDepth if non-NULL, outputs the actual number of elements in the - * host memory part of the DMA FIFO, which may be more than - * the requested number - * @return result of the call - */ -NiFpga_Status NiFpga_ConfigureFifo2(NiFpga_Session session, - uint32_t fifo, - size_t requestedDepth, - size_t* actualDepth); - -/** - * Starts a FIFO. This method is optional. - * - * @param session handle to a currently open session - * @param fifo FIFO to start - * @return result of the call - */ -NiFpga_Status NiFpga_StartFifo(NiFpga_Session session, - uint32_t fifo); - -/** - * Stops a FIFO. This method is optional. - * - * @param session handle to a currently open session - * @param fifo FIFO to stop - * @return result of the call - */ -NiFpga_Status NiFpga_StopFifo(NiFpga_Session session, - uint32_t fifo); - -/** - * Reads from a target-to-host FIFO of booleans. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoBool(NiFpga_Session session, - uint32_t fifo, - NiFpga_Bool* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI8(NiFpga_Session session, - uint32_t fifo, - int8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU8(NiFpga_Session session, - uint32_t fifo, - uint8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI16(NiFpga_Session session, - uint32_t fifo, - int16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU16(NiFpga_Session session, - uint32_t fifo, - uint16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI32(NiFpga_Session session, - uint32_t fifo, - int32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU32(NiFpga_Session session, - uint32_t fifo, - uint32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of signed 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoI64(NiFpga_Session session, - uint32_t fifo, - int64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of unsigned 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoU64(NiFpga_Session session, - uint32_t fifo, - uint64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of single-precision floating-point values. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoSgl(NiFpga_Session session, - uint32_t fifo, - float* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Reads from a target-to-host FIFO of double-precision floating-point values. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param data outputs the data that was read - * @param numberOfElements number of elements to read - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_ReadFifoDbl(NiFpga_Session session, - uint32_t fifo, - double* data, - size_t numberOfElements, - uint32_t timeout, - size_t* elementsRemaining); - -/** - * Writes to a host-to-target FIFO of booleans. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoBool(NiFpga_Session session, - uint32_t fifo, - const NiFpga_Bool* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI8(NiFpga_Session session, - uint32_t fifo, - const int8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 8-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU8(NiFpga_Session session, - uint32_t fifo, - const uint8_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI16(NiFpga_Session session, - uint32_t fifo, - const int16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 16-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU16(NiFpga_Session session, - uint32_t fifo, - const uint16_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI32(NiFpga_Session session, - uint32_t fifo, - const int32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 32-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU32(NiFpga_Session session, - uint32_t fifo, - const uint32_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of signed 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoI64(NiFpga_Session session, - uint32_t fifo, - const int64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of unsigned 64-bit integers. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoU64(NiFpga_Session session, - uint32_t fifo, - const uint64_t* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of single-precision floating-point values. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoSgl(NiFpga_Session session, - uint32_t fifo, - const float* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Writes to a host-to-target FIFO of double-precision floating-point values. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param data data to write - * @param numberOfElements number of elements to write - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param emptyElementsRemaining if non-NULL, outputs the number of empty - * elements remaining in the host memory part of - * the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_WriteFifoDbl(NiFpga_Session session, - uint32_t fifo, - const double* data, - size_t numberOfElements, - uint32_t timeout, - size_t* emptyElementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of booleans. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsBool( - NiFpga_Session session, - uint32_t fifo, - NiFpga_Bool** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 8-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI8( - NiFpga_Session session, - uint32_t fifo, - int8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 8-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU8( - NiFpga_Session session, - uint32_t fifo, - uint8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 16-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI16( - NiFpga_Session session, - uint32_t fifo, - int16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 16-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU16( - NiFpga_Session session, - uint32_t fifo, - uint16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 32-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI32( - NiFpga_Session session, - uint32_t fifo, - int32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 32-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU32( - NiFpga_Session session, - uint32_t fifo, - uint32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of signed 64-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsI64( - NiFpga_Session session, - uint32_t fifo, - int64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of unsigned 64-bit - * integers. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsU64( - NiFpga_Session session, - uint32_t fifo, - uint64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of single-precision - * floating-point values. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsSgl( - NiFpga_Session session, - uint32_t fifo, - float** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for reading from a target-to-host FIFO of double-precision - * floating-point values. - * - * Acquiring, reading, and releasing FIFO elements prevents the need to copy - * the contents of elements from the host memory buffer to a separate - * user-allocated buffer before reading. The FPGA target cannot write to - * elements acquired by the host. Therefore, the host must release elements - * after reading them. The number of elements acquired may differ from the - * number of elements requested if, for example, the number of elements - * requested reaches the end of the host memory buffer. Always release all - * acquired elements before closing the session. Do not attempt to access FIFO - * elements after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo target-to-host FIFO from which to read - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoReadElementsDbl( - NiFpga_Session session, - uint32_t fifo, - double** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of booleans. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsBool( - NiFpga_Session session, - uint32_t fifo, - NiFpga_Bool** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 8-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI8( - NiFpga_Session session, - uint32_t fifo, - int8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 8-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU8( - NiFpga_Session session, - uint32_t fifo, - uint8_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 16-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI16( - NiFpga_Session session, - uint32_t fifo, - int16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 16-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU16( - NiFpga_Session session, - uint32_t fifo, - uint16_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 32-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI32( - NiFpga_Session session, - uint32_t fifo, - int32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 32-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU32( - NiFpga_Session session, - uint32_t fifo, - uint32_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of signed 64-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsI64( - NiFpga_Session session, - uint32_t fifo, - int64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of unsigned 64-bit - * integers. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsU64( - NiFpga_Session session, - uint32_t fifo, - uint64_t** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of single-precision - * floating-point values. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsSgl( - NiFpga_Session session, - uint32_t fifo, - float** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Acquires elements for writing to a host-to-target FIFO of single-precision - * floating-point values. - * - * Acquiring, writing, and releasing FIFO elements prevents the need to write - * first into a separate user-allocated buffer and then copy the contents of - * elements to the host memory buffer. The FPGA target cannot read elements - * acquired by the host. Therefore, the host must release elements after - * writing to them. The number of elements acquired may differ from the number - * of elements requested if, for example, the number of elements requested - * reaches the end of the host memory buffer. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo host-to-target FIFO to which to write - * @param elements outputs a pointer to the elements acquired - * @param elementsRequested requested number of elements - * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout - * @param elementsAcquired actual number of elements acquired, which may be - * less than the requested number - * @param elementsRemaining if non-NULL, outputs the number of elements - * remaining in the host memory part of the DMA FIFO - * @return result of the call - */ -NiFpga_Status NiFpga_AcquireFifoWriteElementsDbl( - NiFpga_Session session, - uint32_t fifo, - double** elements, - size_t elementsRequested, - uint32_t timeout, - size_t* elementsAcquired, - size_t* elementsRemaining); - -/** - * Releases previously acquired FIFO elements. - * - * The FPGA target cannot read elements acquired by the host. Therefore, the - * host must release elements after acquiring them. Always release all acquired - * elements before closing the session. Do not attempt to access FIFO elements - * after the elements are released or the session is closed. - * - * @param session handle to a currently open session - * @param fifo FIFO from which to release elements - * @param elements number of elements to release - * @return result of the call - */ -NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session, - uint32_t fifo, - size_t elements); - -/** - * Gets an endpoint reference to a peer-to-peer FIFO. - * - * @param session handle to a currently open session - * @param fifo peer-to-peer FIFO - * @param endpoint Outputs the endpoint reference. - * The actual type is a nip2p_tEndpointHandle usable by - * the NI Peer-to-Peer Streaming C/C++ API. - * @return result of the call - */ -NiFpga_Status NiFpga_GetPeerToPeerFifoEndpoint(NiFpga_Session session, - uint32_t fifo, - uint32_t* endpoint); - -#if NiFpga_Cpp -} -#endif - -#endif +/* + * FPGA Interface C API 16.0 header file. + * + * Copyright (c) 2016, + * National Instruments Corporation. + * All rights reserved. + */ + +#ifndef __NiFpga_h__ +#define __NiFpga_h__ + +/* + * Determine platform details. + */ +#if defined(_M_IX86) \ + || defined(_M_X64) \ + || defined(_M_AMD64) \ + || defined(i386) \ + || defined(__i386) \ + || defined(__i386__) \ + || defined(__i486__) \ + || defined(__i586__) \ + || defined(__i686__) \ + || defined(__amd64__) \ + || defined(__amd64) \ + || defined(__x86_64__) \ + || defined(__x86_64) \ + || defined(__IA32__) \ + || defined(_X86_) \ + || defined(__THW_INTEL__) \ + || defined(__I86__) \ + || defined(__INTEL__) \ + || defined(__X86__) \ + || defined(__386__) \ + || defined(__I86__) \ + || defined(M_I386) \ + || defined(M_I86) \ + || defined(_M_I386) \ + || defined(_M_I86) + #if defined(_WIN32) \ + || defined(_WIN64) \ + || defined(__WIN32__) \ + || defined(__TOS_WIN__) \ + || defined(__WINDOWS__) \ + || defined(_WINDOWS) \ + || defined(__WINDOWS_386__) \ + || defined(__CYGWIN__) + /* Either Windows or Phar Lap ETS. */ + #define NiFpga_Windows 1 + #elif defined(__linux__) \ + || defined(__linux) \ + || defined(linux) \ + || defined(__gnu_linux__) + #define NiFpga_Linux 1 + #elif defined(__APPLE__) && defined(__MACH__) + #define NiFpga_MacOsX 1 + #else + #error Unsupported OS. + #endif +#elif defined(__powerpc) \ + || defined(__powerpc__) \ + || defined(__POWERPC__) \ + || defined(__ppc__) \ + || defined(__PPC) \ + || defined(_M_PPC) \ + || defined(_ARCH_PPC) \ + || defined(__PPC__) \ + || defined(__ppc) + #if defined(__vxworks) + #define NiFpga_VxWorks 1 + #else + #error Unsupported OS. + #endif +#elif defined(__arm__) \ + || defined(__thumb__) \ + || defined(__TARGET_ARCH_ARM) \ + || defined(__TARGET_ARCH_THUMB) \ + || defined(_ARM) \ + || defined(_M_ARM) \ + || defined(_M_ARMT) +#if defined(__linux__) \ + || defined(__linux) \ + || defined(linux) \ + || defined(__gnu_linux__) + #define NiFpga_Linux 1 +#else + #error Unsupported OS. + #endif +#else + #error Unsupported architecture. +#endif + +/* + * Determine compiler. + */ +#if defined(_MSC_VER) + #define NiFpga_Msvc 1 +#elif defined(__GNUC__) + #define NiFpga_Gcc 1 +#elif defined(_CVI_) && !defined(_TPC_) + #define NiFpga_Cvi 1 + /* Enables CVI Library Protection Errors. */ + #pragma EnableLibraryRuntimeChecking +#else + /* Unknown compiler. */ +#endif + +/* + * Determine compliance with different C/C++ language standards. + */ +#if defined(__cplusplus) + #define NiFpga_Cpp 1 + #if __cplusplus >= 199707L + #define NiFpga_Cpp98 1 + #if __cplusplus >= 201103L + #define NiFpga_Cpp11 1 + #endif + #endif +#endif +#if defined(__STDC__) + #define NiFpga_C89 1 + #if defined(__STDC_VERSION__) + #define NiFpga_C90 1 + #if __STDC_VERSION__ >= 199409L + #define NiFpga_C94 1 + #if __STDC_VERSION__ >= 199901L + #define NiFpga_C99 1 + #if __STDC_VERSION__ >= 201112L + #define NiFpga_C11 1 + #endif + #endif + #endif + #endif +#endif + +/* + * Determine ability to inline functions. + */ +#if NiFpga_Cpp || NiFpga_C99 + /* The inline keyword exists in C++ and C99. */ + #define NiFpga_Inline inline +#elif NiFpga_Msvc + /* Visual C++ (at least since 6.0) also supports an alternate keyword. */ + #define NiFpga_Inline __inline +#elif NiFpga_Gcc + /* GCC (at least since 2.95.2) also supports an alternate keyword. */ + #define NiFpga_Inline __inline__ +#elif !defined(NiFpga_Inline) + /* + * Disable inlining if inline support is unknown. To manually enable + * inlining, #define the following macro before #including NiFpga.h: + * + * #define NiFpga_Inline inline + */ + #define NiFpga_Inline +#endif + +/* + * Define exact-width integer types, if they have not already been defined. + */ +#if NiFpga_ExactWidthIntegerTypesDefined \ + || defined(_STDINT) \ + || defined(_STDINT_H) \ + || defined(_STDINT_H_) \ + || defined(_INTTYPES_H) \ + || defined(_INTTYPES_H_) \ + || defined(_SYS_STDINT_H) \ + || defined(_SYS_STDINT_H_) \ + || defined(_SYS_INTTYPES_H) \ + || defined(_SYS_INTTYPES_H_) \ + || defined(_STDINT_H_INCLUDED) \ + || defined(_MSC_STDINT_H_) \ + || defined(_PSTDINT_H_INCLUDED) + /* Assume that exact-width integer types have already been defined. */ +#elif NiFpga_VxWorks + /* VxWorks (at least 6.3 and earlier) did not have stdint.h. */ + #include +#elif NiFpga_C99 \ + || NiFpga_Gcc /* GCC (at least since 3.0) has a stdint.h. */ \ + || defined(HAVE_STDINT_H) + /* Assume that stdint.h can be included. */ + #include +#elif NiFpga_Msvc \ + || NiFpga_Cvi + /* Manually define exact-width integer types. */ + typedef signed char int8_t; + typedef unsigned char uint8_t; + typedef short int16_t; + typedef unsigned short uint16_t; + typedef int int32_t; + typedef unsigned int uint32_t; + typedef __int64 int64_t; + typedef unsigned __int64 uint64_t; +#else + /* + * Exact-width integer types must be defined by the user, and the following + * macro must be #defined, before #including NiFpga.h: + * + * #define NiFpga_ExactWidthIntegerTypesDefined 1 + */ + #error Exact-width integer types must be defined by the user. See comment. +#endif + +/* Included for definition of size_t. */ +#include + +#if NiFpga_Cpp +extern "C" +{ +#endif + +/** + * A boolean value; either NiFpga_False or NiFpga_True. + */ +typedef uint8_t NiFpga_Bool; + +/** + * Represents a false condition. + */ +static const NiFpga_Bool NiFpga_False = 0; + +/** + * Represents a true condition. + */ +static const NiFpga_Bool NiFpga_True = 1; + +/** + * Represents the resulting status of a function call through its return value. + * 0 is success, negative values are errors, and positive values are warnings. + */ +typedef int32_t NiFpga_Status; + +/** + * No errors or warnings. + */ +static const NiFpga_Status NiFpga_Status_Success = 0; + +/** + * The timeout expired before the FIFO operation could complete. + */ +static const NiFpga_Status NiFpga_Status_FifoTimeout = -50400; + +/** + * No transfer is in progress because the transfer was aborted by the client. + * The operation could not be completed as specified. + */ +static const NiFpga_Status NiFpga_Status_TransferAborted = -50405; + +/** + * A memory allocation failed. Try again after rebooting. + */ +static const NiFpga_Status NiFpga_Status_MemoryFull = -52000; + +/** + * An unexpected software error occurred. + */ +static const NiFpga_Status NiFpga_Status_SoftwareFault = -52003; + +/** + * A parameter to a function was not valid. This could be a NULL pointer, a bad + * value, etc. + */ +static const NiFpga_Status NiFpga_Status_InvalidParameter = -52005; + +/** + * A required resource was not found. The NiFpga.* library, the RIO resource, or + * some other resource may be missing. + */ +static const NiFpga_Status NiFpga_Status_ResourceNotFound = -52006; + +/** + * A required resource was not properly initialized. This could occur if + * NiFpga_Initialize was not called or a required NiFpga_IrqContext was not + * reserved. + */ +static const NiFpga_Status NiFpga_Status_ResourceNotInitialized = -52010; + +/** + * The FPGA is already running. + */ +static const NiFpga_Status NiFpga_Status_FpgaAlreadyRunning = -61003; + +/** + * An error occurred downloading the VI to the FPGA device. Verify that + * the target is connected and powered and that the resource of the target + * is properly configured. + */ +static const NiFpga_Status NiFpga_Status_DownloadError = -61018; + +/** + * The bitfile was not compiled for the specified resource's device type. + */ +static const NiFpga_Status NiFpga_Status_DeviceTypeMismatch = -61024; + +/** + * An error was detected in the communication between the host computer and the + * FPGA target. + */ +static const NiFpga_Status NiFpga_Status_CommunicationTimeout = -61046; + +/** + * The timeout expired before any of the IRQs were asserted. + */ +static const NiFpga_Status NiFpga_Status_IrqTimeout = -61060; + +/** + * The specified bitfile is invalid or corrupt. + */ +static const NiFpga_Status NiFpga_Status_CorruptBitfile = -61070; + +/** + * The requested FIFO depth is invalid. It is either 0 or an amount not + * supported by the hardware. + */ +static const NiFpga_Status NiFpga_Status_BadDepth = -61072; + +/** + * The number of FIFO elements is invalid. Either the number is greater than the + * depth of the host memory DMA FIFO, or more elements were requested for + * release than had been acquired. + */ +static const NiFpga_Status NiFpga_Status_BadReadWriteCount = -61073; + +/** + * A hardware clocking error occurred. A derived clock lost lock with its base + * clock during the execution of the LabVIEW FPGA VI. If any base clocks with + * derived clocks are referencing an external source, make sure that the + * external source is connected and within the supported frequency, jitter, + * accuracy, duty cycle, and voltage specifications. Also verify that the + * characteristics of the base clock match the configuration specified in the + * FPGA Base Clock Properties. If all base clocks with derived clocks are + * generated from free-running, on-board sources, please contact National + * Instruments technical support at ni.com/support. + */ +static const NiFpga_Status NiFpga_Status_ClockLostLock = -61083; + +/** + * The operation could not be performed because the FPGA is busy. Stop all + * activities on the FPGA before requesting this operation. If the target is in + * Scan Interface programming mode, put it in FPGA Interface programming mode. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusy = -61141; + +/** + * The operation could not be performed because the FPGA is busy operating in + * FPGA Interface C API mode. Stop all activities on the FPGA before requesting + * this operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterfaceCApi = -61200; + +/** + * The chassis is in Scan Interface programming mode. In order to run FPGA VIs, + * you must go to the chassis properties page, select FPGA programming mode, and + * deploy settings. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyScanInterface = -61201; + +/** + * The operation could not be performed because the FPGA is busy operating in + * FPGA Interface mode. Stop all activities on the FPGA before requesting this + * operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterface = -61202; + +/** + * The operation could not be performed because the FPGA is busy operating in + * Interactive mode. Stop all activities on the FPGA before requesting this + * operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyInteractive = -61203; + +/** + * The operation could not be performed because the FPGA is busy operating in + * Emulation mode. Stop all activities on the FPGA before requesting this + * operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyEmulation = -61204; + +/** + * LabVIEW FPGA does not support the Reset method for bitfiles that allow + * removal of implicit enable signals in single-cycle Timed Loops. + */ +static const NiFpga_Status NiFpga_Status_ResetCalledWithImplicitEnableRemoval = -61211; + +/** + * LabVIEW FPGA does not support the Abort method for bitfiles that allow + * removal of implicit enable signals in single-cycle Timed Loops. + */ +static const NiFpga_Status NiFpga_Status_AbortCalledWithImplicitEnableRemoval = -61212; + +/** + * LabVIEW FPGA does not support Close and Reset if Last Reference for bitfiles + * that allow removal of implicit enable signals in single-cycle Timed Loops. + * Pass the NiFpga_CloseAttribute_NoResetIfLastSession attribute to NiFpga_Close + * instead of 0. + */ +static const NiFpga_Status NiFpga_Status_CloseAndResetCalledWithImplicitEnableRemoval = -61213; + +/** + * For bitfiles that allow removal of implicit enable signals in single-cycle + * Timed Loops, LabVIEW FPGA does not support this method prior to running the + * bitfile. + */ +static const NiFpga_Status NiFpga_Status_ImplicitEnableRemovalButNotYetRun = -61214; + +/** + * Bitfiles that allow removal of implicit enable signals in single-cycle Timed + * Loops can run only once. Download the bitfile again before re-running the VI. + */ +static const NiFpga_Status NiFpga_Status_RunAfterStoppedCalledWithImplicitEnableRemoval = -61215; + +/** + * A gated clock has violated the handshaking protocol. If you are using + * external gated clocks, ensure that they follow the required clock gating + * protocol. If you are generating your clocks internally, please contact + * National Instruments Technical Support. + */ +static const NiFpga_Status NiFpga_Status_GatedClockHandshakingViolation = -61216; + +/** + * The number of elements requested must be less than or equal to the number of + * unacquired elements left in the host memory DMA FIFO. There are currently + * fewer unacquired elements left in the FIFO than are being requested. Release + * some acquired elements before acquiring more elements. + */ +static const NiFpga_Status NiFpga_Status_ElementsNotPermissibleToBeAcquired = -61219; + +/** + * The operation could not be performed because the FPGA is in configuration or + * discovery mode. Wait for configuration or discovery to complete and retry + * your operation. + */ +static const NiFpga_Status NiFpga_Status_FpgaBusyConfiguration = -61252; + +/** + * LabVIEW FPGA does not support Close and Reset if Last Reference for bitfiles + * that do not support Reset. Pass the + * NiFpga_CloseAttribute_NoResetIfLastSession attribute to NiFpga_Close instead + * of 0. + */ +static const NiFpga_Status NiFpga_Status_CloseAndResetCalledWithResetNotSupported = -61253; + +/** + * An unexpected internal error occurred. + */ +static const NiFpga_Status NiFpga_Status_InternalError = -61499; + +/** + * The NI-RIO driver was unable to allocate memory for a FIFO. This can happen + * when the combined depth of all DMA FIFOs exceeds the maximum depth for the + * controller, or when the controller runs out of system memory. You may be able + * to reconfigure the controller with a greater maximum FIFO depth. For more + * information, refer to the NI KnowledgeBase article 65OF2ERQ. + */ +static const NiFpga_Status NiFpga_Status_TotalDmaFifoDepthExceeded = -63003; + +/** + * Access to the remote system was denied. Use MAX to check the Remote Device + * Access settings under Software>>NI-RIO>>NI-RIO Settings on the remote system. + */ +static const NiFpga_Status NiFpga_Status_AccessDenied = -63033; + +/** + * The NI-RIO software on the host is not compatible with the software on the + * target. Upgrade the NI-RIO software on the host in order to connect to this + * target. + */ +static const NiFpga_Status NiFpga_Status_HostVersionMismatch = -63038; + +/** + * A connection could not be established to the specified remote device. Ensure + * that the device is on and accessible over the network, that NI-RIO software + * is installed, and that the RIO server is running and properly configured. + */ +static const NiFpga_Status NiFpga_Status_RpcConnectionError = -63040; + +/** + * The RPC session is invalid. The target may have reset or been rebooted. Check + * the network connection and retry the operation. + */ +static const NiFpga_Status NiFpga_Status_RpcSessionError = -63043; + +/** + * The operation could not complete because another session is accessing the + * FIFO. Close the other session and retry. + */ +static const NiFpga_Status NiFpga_Status_FifoReserved = -63082; + +/** + * A Configure FIFO, Stop FIFO, Read FIFO, or Write FIFO function was called + * while the host had acquired elements of the FIFO. Release all acquired + * elements before configuring, stopping, reading, or writing. + */ +static const NiFpga_Status NiFpga_Status_FifoElementsCurrentlyAcquired = -63083; + +/** + * A function was called using a misaligned address. The address must be a + * multiple of the size of the datatype. + */ +static const NiFpga_Status NiFpga_Status_MisalignedAccess = -63084; + +/** + * The FPGA Read/Write Control Function is accessing a control or indicator + * with data that exceeds the maximum size supported on the current target. + * Refer to the hardware documentation for the limitations on data types for + * this target. + */ +static const NiFpga_Status NiFpga_Status_ControlOrIndicatorTooLarge = -63085; + +/** + * A valid .lvbitx bitfile is required. If you are using a valid .lvbitx + * bitfile, the bitfile may not be compatible with the software you are using. + * Determine which version of LabVIEW was used to make the bitfile, update your + * software to that version or later, and try again. + */ +static const NiFpga_Status NiFpga_Status_BitfileReadError = -63101; + +/** + * The specified signature does not match the signature of the bitfile. If the + * bitfile has been recompiled, regenerate the C API and rebuild the + * application. + */ +static const NiFpga_Status NiFpga_Status_SignatureMismatch = -63106; + +/** + * The bitfile you are trying to use is incompatible with the version + * of NI-RIO installed on the target and/or host. Update the version + * of NI-RIO on the target and/or host to the same version (or later) + * used to compile the bitfile. Alternatively, recompile the bitfile + * with the same version of NI-RIO that is currently installed on the + * target and/or host. + */ +static const NiFpga_Status NiFpga_Status_IncompatibleBitfile = -63107; + +/** + * A hardware failure has occurred. The operation could not be completed as + * specified. + */ +static const NiFpga_Status NiFpga_Status_HardwareFault = -63150; + +/** + * Either the supplied resource name is invalid as a RIO resource name, or the + * device was not found. Use MAX to find the proper resource name for the + * intended device. + */ +static const NiFpga_Status NiFpga_Status_InvalidResourceName = -63192; + +/** + * The requested feature is not supported. + */ +static const NiFpga_Status NiFpga_Status_FeatureNotSupported = -63193; + +/** + * The NI-RIO software on the target system is not compatible with this + * software. Upgrade the NI-RIO software on the target system. + */ +static const NiFpga_Status NiFpga_Status_VersionMismatch = -63194; + +/** + * The session is invalid or has been closed. + */ +static const NiFpga_Status NiFpga_Status_InvalidSession = -63195; + +/** + * The maximum number of open FPGA sessions has been reached. Close some open + * sessions. + */ +static const NiFpga_Status NiFpga_Status_OutOfHandles = -63198; + +/** + * Tests whether a status is an error. + * + * @param status status to check for an error + * @return whether the status was an error + */ +static NiFpga_Inline NiFpga_Bool NiFpga_IsError(const NiFpga_Status status) +{ + return status < NiFpga_Status_Success ? NiFpga_True : NiFpga_False; +} + +/** + * Tests whether a status is not an error. Success and warnings are not errors. + * + * @param status status to check for an error + * @return whether the status was a success or warning + */ +static NiFpga_Inline NiFpga_Bool NiFpga_IsNotError(const NiFpga_Status status) +{ + return status >= NiFpga_Status_Success ? NiFpga_True : NiFpga_False; +} + +/** + * Conditionally sets the status to a new value. The previous status is + * preserved unless the new status is more of an error, which means that + * warnings and errors overwrite successes, and errors overwrite warnings. New + * errors do not overwrite older errors, and new warnings do not overwrite + * older warnings. + * + * @param status status to conditionally set + * @param newStatus new status value that may be set + * @return the resulting status + */ +static NiFpga_Inline NiFpga_Status NiFpga_MergeStatus( + NiFpga_Status* const status, + const NiFpga_Status newStatus) +{ + if (!status) + return NiFpga_Status_InvalidParameter; + if (NiFpga_IsNotError(*status) + && (*status == NiFpga_Status_Success || NiFpga_IsError(newStatus))) + *status = newStatus; + return *status; +} + +/** + * This macro evaluates the expression only if the status is not an error. The + * expression must evaluate to an NiFpga_Status, such as a call to any NiFpga_* + * function, because the status will be set to the returned status if the + * expression is evaluated. + * + * You can use this macro to mimic status chaining in LabVIEW, where the status + * does not have to be explicitly checked after each call. Such code may look + * like the following example. + * + * NiFpga_Status status = NiFpga_Status_Success; + * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); + * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); + * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...)); + * + * @param status status to check for an error + * @param expression expression to call if the incoming status is not an error + */ +#define NiFpga_IfIsNotError(status, expression) \ + if (NiFpga_IsNotError(status)) \ + NiFpga_MergeStatus(&status, (expression)); \ + +/** + * You must call this function before all other function calls. This function + * loads the NiFpga library so that all the other functions will work. If this + * function succeeds, you must call NiFpga_Finalize after all other function + * calls. + * + * @warning This function is not thread safe. + * + * @return result of the call + */ +NiFpga_Status NiFpga_Initialize(void); + +/** + * You must call this function after all other function calls if + * NiFpga_Initialize succeeds. This function unloads the NiFpga library. + * + * @warning This function is not thread safe. + * + * @return result of the call + */ +NiFpga_Status NiFpga_Finalize(void); + +/** + * A handle to an FPGA session. + */ +typedef uint32_t NiFpga_Session; + +/** + * Attributes that NiFpga_Open accepts. + */ +typedef enum +{ + NiFpga_OpenAttribute_NoRun = 1 +} NiFpga_OpenAttribute; + +/** + * Opens a session to the FPGA. This call ensures that the contents of the + * bitfile are programmed to the FPGA. The FPGA runs unless the + * NiFpga_OpenAttribute_NoRun attribute is used. + * + * Because different operating systems have different default current working + * directories for applications, you must pass an absolute path for the bitfile + * parameter. If you pass only the filename instead of an absolute path, the + * operating system may not be able to locate the bitfile. For example, the + * default current working directories are C:\ni-rt\system\ for Phar Lap ETS and + * /c/ for VxWorks. Because the generated *_Bitfile constant is a #define to a + * string literal, you can use C/C++ string-literal concatenation to form an + * absolute path. For example, if the bitfile is in the root directory of a + * Phar Lap ETS system, pass the following for the bitfile parameter. + * + * "C:\\" NiFpga_MyApplication_Bitfile + * + * @param bitfile path to the bitfile + * @param signature signature of the bitfile + * @param resource RIO resource string to open ("RIO0" or "rio://mysystem/RIO") + * @param attribute bitwise OR of any NiFpga_OpenAttributes, or 0 + * @param session outputs the session handle, which must be closed when no + * longer needed + * @return result of the call + */ +NiFpga_Status NiFpga_Open(const char* bitfile, + const char* signature, + const char* resource, + uint32_t attribute, + NiFpga_Session* session); + +/** + * Attributes that NiFpga_Close accepts. + */ +typedef enum +{ + NiFpga_CloseAttribute_NoResetIfLastSession = 1 +} NiFpga_CloseAttribute; + +/** + * Closes the session to the FPGA. The FPGA resets unless either another session + * is still open or you use the NiFpga_CloseAttribute_NoResetIfLastSession + * attribute. + * + * @param session handle to a currently open session + * @param attribute bitwise OR of any NiFpga_CloseAttributes, or 0 + * @return result of the call + */ +NiFpga_Status NiFpga_Close(NiFpga_Session session, + uint32_t attribute); + +/** + * Attributes that NiFpga_Run accepts. + */ +typedef enum +{ + NiFpga_RunAttribute_WaitUntilDone = 1 +} NiFpga_RunAttribute; + +/** + * Runs the FPGA VI on the target. If you use NiFpga_RunAttribute_WaitUntilDone, + * NiFpga_Run blocks the thread until the FPGA finishes running. + * + * @param session handle to a currently open session + * @param attribute bitwise OR of any NiFpga_RunAttributes, or 0 + * @return result of the call + */ +NiFpga_Status NiFpga_Run(NiFpga_Session session, + uint32_t attribute); + +/** + * Aborts the FPGA VI. + * + * @param session handle to a currently open session + * @return result of the call + */ +NiFpga_Status NiFpga_Abort(NiFpga_Session session); + +/** + * Resets the FPGA VI. + * + * @param session handle to a currently open session + * @return result of the call + */ +NiFpga_Status NiFpga_Reset(NiFpga_Session session); + +/** + * Re-downloads the FPGA bitstream to the target. + * + * @param session handle to a currently open session + * @return result of the call + */ +NiFpga_Status NiFpga_Download(NiFpga_Session session); + +/** + * Reads a boolean value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadBool(NiFpga_Session session, + uint32_t indicator, + NiFpga_Bool* value); + +/** + * Reads a signed 8-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI8(NiFpga_Session session, + uint32_t indicator, + int8_t* value); + +/** + * Reads an unsigned 8-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU8(NiFpga_Session session, + uint32_t indicator, + uint8_t* value); + +/** + * Reads a signed 16-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI16(NiFpga_Session session, + uint32_t indicator, + int16_t* value); + +/** + * Reads an unsigned 16-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU16(NiFpga_Session session, + uint32_t indicator, + uint16_t* value); + +/** + * Reads a signed 32-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI32(NiFpga_Session session, + uint32_t indicator, + int32_t* value); + +/** + * Reads an unsigned 32-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU32(NiFpga_Session session, + uint32_t indicator, + uint32_t* value); + +/** + * Reads a signed 64-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadI64(NiFpga_Session session, + uint32_t indicator, + int64_t* value); + +/** + * Reads an unsigned 64-bit integer value from a given indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadU64(NiFpga_Session session, + uint32_t indicator, + uint64_t* value); + +/** + * Reads a single-precision floating-point value from a given indicator or + * control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadSgl(NiFpga_Session session, + uint32_t indicator, + float* value); + +/** + * Reads a double-precision floating-point value from a given indicator or + * control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param value outputs the value that was read + * @return result of the call + */ +NiFpga_Status NiFpga_ReadDbl(NiFpga_Session session, + uint32_t indicator, + double* value); + +/** + * Writes a boolean value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteBool(NiFpga_Session session, + uint32_t control, + NiFpga_Bool value); + +/** + * Writes a signed 8-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI8(NiFpga_Session session, + uint32_t control, + int8_t value); + +/** + * Writes an unsigned 8-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU8(NiFpga_Session session, + uint32_t control, + uint8_t value); + +/** + * Writes a signed 16-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI16(NiFpga_Session session, + uint32_t control, + int16_t value); + +/** + * Writes an unsigned 16-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU16(NiFpga_Session session, + uint32_t control, + uint16_t value); + +/** + * Writes a signed 32-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI32(NiFpga_Session session, + uint32_t control, + int32_t value); + +/** + * Writes an unsigned 32-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU32(NiFpga_Session session, + uint32_t control, + uint32_t value); + +/** + * Writes a signed 64-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteI64(NiFpga_Session session, + uint32_t control, + int64_t value); + +/** + * Writes an unsigned 64-bit integer value to a given control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteU64(NiFpga_Session session, + uint32_t control, + uint64_t value); + +/** + * Writes a single-precision floating-point value to a given control or + * indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteSgl(NiFpga_Session session, + uint32_t control, + float value); + +/** + * Writes a double-precision floating-point value to a given control or + * indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param value value to write + * @return result of the call + */ +NiFpga_Status NiFpga_WriteDbl(NiFpga_Session session, + uint32_t control, + double value); + +/** + * Reads an entire array of boolean values from a given array indicator or + * control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayBool(NiFpga_Session session, + uint32_t indicator, + NiFpga_Bool* array, + size_t size); + +/** + * Reads an entire array of signed 8-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI8(NiFpga_Session session, + uint32_t indicator, + int8_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 8-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU8(NiFpga_Session session, + uint32_t indicator, + uint8_t* array, + size_t size); + +/** + * Reads an entire array of signed 16-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI16(NiFpga_Session session, + uint32_t indicator, + int16_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 16-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU16(NiFpga_Session session, + uint32_t indicator, + uint16_t* array, + size_t size); + +/** + * Reads an entire array of signed 32-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI32(NiFpga_Session session, + uint32_t indicator, + int32_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 32-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU32(NiFpga_Session session, + uint32_t indicator, + uint32_t* array, + size_t size); + +/** + * Reads an entire array of signed 64-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayI64(NiFpga_Session session, + uint32_t indicator, + int64_t* array, + size_t size); + +/** + * Reads an entire array of unsigned 64-bit integer values from a given array + * indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayU64(NiFpga_Session session, + uint32_t indicator, + uint64_t* array, + size_t size); + +/** + * Reads an entire array of single-precision floating-point values from a + * given array indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArraySgl(NiFpga_Session session, + uint32_t indicator, + float* array, + size_t size); + +/** + * Reads an entire array of double-precision floating-point values from a + * given array indicator or control. + * + * @warning The size passed must be the exact number of elements in the + * indicator or control. + * + * @param session handle to a currently open session + * @param indicator indicator or control from which to read + * @param array outputs the entire array that was read + * @param size exact number of elements in the indicator or control + * @return result of the call + */ +NiFpga_Status NiFpga_ReadArrayDbl(NiFpga_Session session, + uint32_t indicator, + double* array, + size_t size); + +/** + * Writes an entire array of boolean values to a given array control or + * indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayBool(NiFpga_Session session, + uint32_t control, + const NiFpga_Bool* array, + size_t size); + +/** + * Writes an entire array of signed 8-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI8(NiFpga_Session session, + uint32_t control, + const int8_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 8-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU8(NiFpga_Session session, + uint32_t control, + const uint8_t* array, + size_t size); + +/** + * Writes an entire array of signed 16-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI16(NiFpga_Session session, + uint32_t control, + const int16_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 16-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU16(NiFpga_Session session, + uint32_t control, + const uint16_t* array, + size_t size); + +/** + * Writes an entire array of signed 32-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI32(NiFpga_Session session, + uint32_t control, + const int32_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 32-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU32(NiFpga_Session session, + uint32_t control, + const uint32_t* array, + size_t size); + +/** + * Writes an entire array of signed 64-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayI64(NiFpga_Session session, + uint32_t control, + const int64_t* array, + size_t size); + +/** + * Writes an entire array of unsigned 64-bit integer values to a given array + * control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayU64(NiFpga_Session session, + uint32_t control, + const uint64_t* array, + size_t size); + +/** + * Writes an entire array of single-precision floating-point values to a given + * array control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArraySgl(NiFpga_Session session, + uint32_t control, + const float* array, + size_t size); + +/** + * Writes an entire array of double-precision floating-point values to a given + * array control or indicator. + * + * @warning The size passed must be the exact number of elements in the + * control or indicator. + * + * @param session handle to a currently open session + * @param control control or indicator to which to write + * @param array entire array to write + * @param size exact number of elements in the control or indicator + * @return result of the call + */ +NiFpga_Status NiFpga_WriteArrayDbl(NiFpga_Session session, + uint32_t control, + const double* array, + size_t size); + +/** + * Enumeration of all 32 possible IRQs. Multiple IRQs can be bitwise ORed + * together like this: + * + * NiFpga_Irq_3 | NiFpga_Irq_23 + */ +typedef enum +{ + NiFpga_Irq_0 = 1 << 0, + NiFpga_Irq_1 = 1 << 1, + NiFpga_Irq_2 = 1 << 2, + NiFpga_Irq_3 = 1 << 3, + NiFpga_Irq_4 = 1 << 4, + NiFpga_Irq_5 = 1 << 5, + NiFpga_Irq_6 = 1 << 6, + NiFpga_Irq_7 = 1 << 7, + NiFpga_Irq_8 = 1 << 8, + NiFpga_Irq_9 = 1 << 9, + NiFpga_Irq_10 = 1 << 10, + NiFpga_Irq_11 = 1 << 11, + NiFpga_Irq_12 = 1 << 12, + NiFpga_Irq_13 = 1 << 13, + NiFpga_Irq_14 = 1 << 14, + NiFpga_Irq_15 = 1 << 15, + NiFpga_Irq_16 = 1 << 16, + NiFpga_Irq_17 = 1 << 17, + NiFpga_Irq_18 = 1 << 18, + NiFpga_Irq_19 = 1 << 19, + NiFpga_Irq_20 = 1 << 20, + NiFpga_Irq_21 = 1 << 21, + NiFpga_Irq_22 = 1 << 22, + NiFpga_Irq_23 = 1 << 23, + NiFpga_Irq_24 = 1 << 24, + NiFpga_Irq_25 = 1 << 25, + NiFpga_Irq_26 = 1 << 26, + NiFpga_Irq_27 = 1 << 27, + NiFpga_Irq_28 = 1 << 28, + NiFpga_Irq_29 = 1 << 29, + NiFpga_Irq_30 = 1 << 30, + NiFpga_Irq_31 = 1U << 31 +} NiFpga_Irq; + +/** + * Represents an infinite timeout. + */ +static const uint32_t NiFpga_InfiniteTimeout = 0xFFFFFFFF; + +/** + * See NiFpga_ReserveIrqContext for more information. + */ +typedef void* NiFpga_IrqContext; + +/** + * IRQ contexts are single-threaded; only one thread can wait with a + * particular context at any given time. To minimize jitter when first + * waiting on IRQs, reserve as many contexts as the application + * requires. + * + * If a context is successfully reserved (the returned status is not an error), + * it must be unreserved later. Otherwise a memory leak will occur. + * + * @param session handle to a currently open session + * @param context outputs the IRQ context + * @return result of the call + */ +NiFpga_Status NiFpga_ReserveIrqContext(NiFpga_Session session, + NiFpga_IrqContext* context); + +/** + * Unreserves an IRQ context obtained from NiFpga_ReserveIrqContext. + * + * @param session handle to a currently open session + * @param context IRQ context to unreserve + * @return result of the call + */ +NiFpga_Status NiFpga_UnreserveIrqContext(NiFpga_Session session, + NiFpga_IrqContext context); + +/** + * This is a blocking function that stops the calling thread until the + * FPGA asserts any IRQ in the irqs parameter, or until the function + * call times out. Before calling this function, use + * NiFpga_ReserveIrqContext to reserve an IRQ context. No other + * threads can use the same context when this function is called. + * + * You can use the irqsAsserted parameter to determine which IRQs were asserted + * for each function call. + * + * @param session handle to a currently open session + * @param context IRQ context with which to wait + * @param irqs bitwise OR of NiFpga_Irqs + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param irqsAsserted if non-NULL, outputs bitwise OR of IRQs that were + * asserted + * @param timedOut if non-NULL, outputs whether the timeout expired + * @return result of the call + */ +NiFpga_Status NiFpga_WaitOnIrqs(NiFpga_Session session, + NiFpga_IrqContext context, + uint32_t irqs, + uint32_t timeout, + uint32_t* irqsAsserted, + NiFpga_Bool* timedOut); + +/** + * Acknowledges an IRQ or set of IRQs. + * + * @param session handle to a currently open session + * @param irqs bitwise OR of NiFpga_Irqs + * @return result of the call + */ +NiFpga_Status NiFpga_AcknowledgeIrqs(NiFpga_Session session, + uint32_t irqs); + +/** + * Specifies the depth of the host memory part of the DMA FIFO. This method is + * optional. In order to see the actual depth configured, use + * NiFpga_ConfigureFifo2. + * + * @param session handle to a currently open session + * @param fifo FIFO to configure + * @param depth requested number of elements in the host memory part of the + * DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ConfigureFifo(NiFpga_Session session, + uint32_t fifo, + size_t depth); + +/** + * Specifies the depth of the host memory part of the DMA FIFO. This method is + * optional. + * + * @param session handle to a currently open session + * @param fifo FIFO to configure + * @param requestedDepth requested number of elements in the host memory part + * of the DMA FIFO + * @param actualDepth if non-NULL, outputs the actual number of elements in the + * host memory part of the DMA FIFO, which may be more than + * the requested number + * @return result of the call + */ +NiFpga_Status NiFpga_ConfigureFifo2(NiFpga_Session session, + uint32_t fifo, + size_t requestedDepth, + size_t* actualDepth); + +/** + * Starts a FIFO. This method is optional. + * + * @param session handle to a currently open session + * @param fifo FIFO to start + * @return result of the call + */ +NiFpga_Status NiFpga_StartFifo(NiFpga_Session session, + uint32_t fifo); + +/** + * Stops a FIFO. This method is optional. + * + * @param session handle to a currently open session + * @param fifo FIFO to stop + * @return result of the call + */ +NiFpga_Status NiFpga_StopFifo(NiFpga_Session session, + uint32_t fifo); + +/** + * Reads from a target-to-host FIFO of booleans. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoBool(NiFpga_Session session, + uint32_t fifo, + NiFpga_Bool* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI8(NiFpga_Session session, + uint32_t fifo, + int8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU8(NiFpga_Session session, + uint32_t fifo, + uint8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI16(NiFpga_Session session, + uint32_t fifo, + int16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU16(NiFpga_Session session, + uint32_t fifo, + uint16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI32(NiFpga_Session session, + uint32_t fifo, + int32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU32(NiFpga_Session session, + uint32_t fifo, + uint32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of signed 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoI64(NiFpga_Session session, + uint32_t fifo, + int64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of unsigned 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoU64(NiFpga_Session session, + uint32_t fifo, + uint64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of single-precision floating-point values. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoSgl(NiFpga_Session session, + uint32_t fifo, + float* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Reads from a target-to-host FIFO of double-precision floating-point values. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param data outputs the data that was read + * @param numberOfElements number of elements to read + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_ReadFifoDbl(NiFpga_Session session, + uint32_t fifo, + double* data, + size_t numberOfElements, + uint32_t timeout, + size_t* elementsRemaining); + +/** + * Writes to a host-to-target FIFO of booleans. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoBool(NiFpga_Session session, + uint32_t fifo, + const NiFpga_Bool* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI8(NiFpga_Session session, + uint32_t fifo, + const int8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 8-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU8(NiFpga_Session session, + uint32_t fifo, + const uint8_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI16(NiFpga_Session session, + uint32_t fifo, + const int16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 16-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU16(NiFpga_Session session, + uint32_t fifo, + const uint16_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI32(NiFpga_Session session, + uint32_t fifo, + const int32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 32-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU32(NiFpga_Session session, + uint32_t fifo, + const uint32_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of signed 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoI64(NiFpga_Session session, + uint32_t fifo, + const int64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of unsigned 64-bit integers. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoU64(NiFpga_Session session, + uint32_t fifo, + const uint64_t* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of single-precision floating-point values. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoSgl(NiFpga_Session session, + uint32_t fifo, + const float* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Writes to a host-to-target FIFO of double-precision floating-point values. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param data data to write + * @param numberOfElements number of elements to write + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param emptyElementsRemaining if non-NULL, outputs the number of empty + * elements remaining in the host memory part of + * the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_WriteFifoDbl(NiFpga_Session session, + uint32_t fifo, + const double* data, + size_t numberOfElements, + uint32_t timeout, + size_t* emptyElementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of booleans. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsBool( + NiFpga_Session session, + uint32_t fifo, + NiFpga_Bool** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 8-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI8( + NiFpga_Session session, + uint32_t fifo, + int8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 8-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU8( + NiFpga_Session session, + uint32_t fifo, + uint8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 16-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI16( + NiFpga_Session session, + uint32_t fifo, + int16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 16-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU16( + NiFpga_Session session, + uint32_t fifo, + uint16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 32-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI32( + NiFpga_Session session, + uint32_t fifo, + int32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 32-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU32( + NiFpga_Session session, + uint32_t fifo, + uint32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of signed 64-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsI64( + NiFpga_Session session, + uint32_t fifo, + int64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of unsigned 64-bit + * integers. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsU64( + NiFpga_Session session, + uint32_t fifo, + uint64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of single-precision + * floating-point values. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsSgl( + NiFpga_Session session, + uint32_t fifo, + float** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for reading from a target-to-host FIFO of double-precision + * floating-point values. + * + * Acquiring, reading, and releasing FIFO elements prevents the need to copy + * the contents of elements from the host memory buffer to a separate + * user-allocated buffer before reading. The FPGA target cannot write to + * elements acquired by the host. Therefore, the host must release elements + * after reading them. The number of elements acquired may differ from the + * number of elements requested if, for example, the number of elements + * requested reaches the end of the host memory buffer. Always release all + * acquired elements before closing the session. Do not attempt to access FIFO + * elements after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo target-to-host FIFO from which to read + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoReadElementsDbl( + NiFpga_Session session, + uint32_t fifo, + double** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of booleans. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsBool( + NiFpga_Session session, + uint32_t fifo, + NiFpga_Bool** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 8-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI8( + NiFpga_Session session, + uint32_t fifo, + int8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 8-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU8( + NiFpga_Session session, + uint32_t fifo, + uint8_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 16-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI16( + NiFpga_Session session, + uint32_t fifo, + int16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 16-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU16( + NiFpga_Session session, + uint32_t fifo, + uint16_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 32-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI32( + NiFpga_Session session, + uint32_t fifo, + int32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 32-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU32( + NiFpga_Session session, + uint32_t fifo, + uint32_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of signed 64-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsI64( + NiFpga_Session session, + uint32_t fifo, + int64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of unsigned 64-bit + * integers. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsU64( + NiFpga_Session session, + uint32_t fifo, + uint64_t** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of single-precision + * floating-point values. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsSgl( + NiFpga_Session session, + uint32_t fifo, + float** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Acquires elements for writing to a host-to-target FIFO of single-precision + * floating-point values. + * + * Acquiring, writing, and releasing FIFO elements prevents the need to write + * first into a separate user-allocated buffer and then copy the contents of + * elements to the host memory buffer. The FPGA target cannot read elements + * acquired by the host. Therefore, the host must release elements after + * writing to them. The number of elements acquired may differ from the number + * of elements requested if, for example, the number of elements requested + * reaches the end of the host memory buffer. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo host-to-target FIFO to which to write + * @param elements outputs a pointer to the elements acquired + * @param elementsRequested requested number of elements + * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout + * @param elementsAcquired actual number of elements acquired, which may be + * less than the requested number + * @param elementsRemaining if non-NULL, outputs the number of elements + * remaining in the host memory part of the DMA FIFO + * @return result of the call + */ +NiFpga_Status NiFpga_AcquireFifoWriteElementsDbl( + NiFpga_Session session, + uint32_t fifo, + double** elements, + size_t elementsRequested, + uint32_t timeout, + size_t* elementsAcquired, + size_t* elementsRemaining); + +/** + * Releases previously acquired FIFO elements. + * + * The FPGA target cannot read elements acquired by the host. Therefore, the + * host must release elements after acquiring them. Always release all acquired + * elements before closing the session. Do not attempt to access FIFO elements + * after the elements are released or the session is closed. + * + * @param session handle to a currently open session + * @param fifo FIFO from which to release elements + * @param elements number of elements to release + * @return result of the call + */ +NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session, + uint32_t fifo, + size_t elements); + +/** + * Gets an endpoint reference to a peer-to-peer FIFO. + * + * @param session handle to a currently open session + * @param fifo peer-to-peer FIFO + * @param endpoint Outputs the endpoint reference. + * The actual type is a nip2p_tEndpointHandle usable by + * the NI Peer-to-Peer Streaming C/C++ API. + * @return result of the call + */ +NiFpga_Status NiFpga_GetPeerToPeerFifoEndpoint(NiFpga_Session session, + uint32_t fifo, + uint32_t* endpoint); + +#if NiFpga_Cpp +} +#endif + +#endif diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h index 151898f010..2b5e5f25d2 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h @@ -1,15 +1,15 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_nInterfaceGlobals_h__ -#define __nFRC_2017_17_0_2_nInterfaceGlobals_h__ - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - extern unsigned int g_currentTargetClass; -} -} - -#endif // __nFRC_2017_17_0_2_nInterfaceGlobals_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_nInterfaceGlobals_h__ +#define __nFRC_2017_17_0_2_nInterfaceGlobals_h__ + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + extern unsigned int g_currentTargetClass; +} +} + +#endif // __nFRC_2017_17_0_2_nInterfaceGlobals_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h index 53f9183c55..3d5a68619c 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h @@ -1,144 +1,144 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_AI_h__ -#define __nFRC_2017_17_0_2_AI_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tAI -{ -public: - tAI(){} - virtual ~tAI(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tAI* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned ScanSize : 3; - unsigned ConvertRate : 26; -#else - unsigned ConvertRate : 26; - unsigned ScanSize : 3; -#endif - }; - struct{ - unsigned value : 29; - }; - } tConfig; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Channel : 3; - unsigned Averaged : 1; -#else - unsigned Averaged : 1; - unsigned Channel : 3; -#endif - }; - struct{ - unsigned value : 4; - }; - } tReadSelect; - - - - typedef enum - { - } tOutput_IfaceConstants; - - virtual signed int readOutput(tRioStatusCode *status) = 0; - - - typedef enum - { - } tConfig_IfaceConstants; - - virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; - virtual void writeConfig_ScanSize(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_ConvertRate(unsigned int value, tRioStatusCode *status) = 0; - virtual tConfig readConfig(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_ScanSize(tRioStatusCode *status) = 0; - virtual unsigned int readConfig_ConvertRate(tRioStatusCode *status) = 0; - - - typedef enum - { - } tLoopTiming_IfaceConstants; - - virtual unsigned int readLoopTiming(tRioStatusCode *status) = 0; - - - typedef enum - { - kNumOversampleBitsElements = 8, - } tOversampleBits_IfaceConstants; - - virtual void writeOversampleBits(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readOversampleBits(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumAverageBitsElements = 8, - } tAverageBits_IfaceConstants; - - virtual void writeAverageBits(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readAverageBits(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumScanListElements = 8, - } tScanList_IfaceConstants; - - virtual void writeScanList(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readScanList(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - } tLatchOutput_IfaceConstants; - - virtual void strobeLatchOutput(tRioStatusCode *status) = 0; - - - typedef enum - { - } tReadSelect_IfaceConstants; - - virtual void writeReadSelect(tReadSelect value, tRioStatusCode *status) = 0; - virtual void writeReadSelect_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeReadSelect_Averaged(bool value, tRioStatusCode *status) = 0; - virtual tReadSelect readReadSelect(tRioStatusCode *status) = 0; - virtual unsigned char readReadSelect_Channel(tRioStatusCode *status) = 0; - virtual bool readReadSelect_Averaged(tRioStatusCode *status) = 0; - - - - -private: - tAI(const tAI&); - void operator=(const tAI&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_AI_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_AI_h__ +#define __nFRC_2017_17_0_2_AI_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tAI +{ +public: + tAI(){} + virtual ~tAI(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tAI* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned ScanSize : 3; + unsigned ConvertRate : 26; +#else + unsigned ConvertRate : 26; + unsigned ScanSize : 3; +#endif + }; + struct{ + unsigned value : 29; + }; + } tConfig; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Channel : 3; + unsigned Averaged : 1; +#else + unsigned Averaged : 1; + unsigned Channel : 3; +#endif + }; + struct{ + unsigned value : 4; + }; + } tReadSelect; + + + + typedef enum + { + } tOutput_IfaceConstants; + + virtual signed int readOutput(tRioStatusCode *status) = 0; + + + typedef enum + { + } tConfig_IfaceConstants; + + virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; + virtual void writeConfig_ScanSize(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_ConvertRate(unsigned int value, tRioStatusCode *status) = 0; + virtual tConfig readConfig(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_ScanSize(tRioStatusCode *status) = 0; + virtual unsigned int readConfig_ConvertRate(tRioStatusCode *status) = 0; + + + typedef enum + { + } tLoopTiming_IfaceConstants; + + virtual unsigned int readLoopTiming(tRioStatusCode *status) = 0; + + + typedef enum + { + kNumOversampleBitsElements = 8, + } tOversampleBits_IfaceConstants; + + virtual void writeOversampleBits(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readOversampleBits(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumAverageBitsElements = 8, + } tAverageBits_IfaceConstants; + + virtual void writeAverageBits(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readAverageBits(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumScanListElements = 8, + } tScanList_IfaceConstants; + + virtual void writeScanList(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readScanList(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + } tLatchOutput_IfaceConstants; + + virtual void strobeLatchOutput(tRioStatusCode *status) = 0; + + + typedef enum + { + } tReadSelect_IfaceConstants; + + virtual void writeReadSelect(tReadSelect value, tRioStatusCode *status) = 0; + virtual void writeReadSelect_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeReadSelect_Averaged(bool value, tRioStatusCode *status) = 0; + virtual tReadSelect readReadSelect(tRioStatusCode *status) = 0; + virtual unsigned char readReadSelect_Channel(tRioStatusCode *status) = 0; + virtual bool readReadSelect_Averaged(tRioStatusCode *status) = 0; + + + + +private: + tAI(const tAI&); + void operator=(const tAI&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_AI_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h index 5fe3c04862..2fd7d5f554 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h @@ -1,51 +1,51 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_AO_h__ -#define __nFRC_2017_17_0_2_AO_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tAO -{ -public: - tAO(){} - virtual ~tAO(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tAO* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - - - - - - typedef enum - { - kNumMXPRegisters = 2, - } tMXP_IfaceConstants; - - virtual void writeMXP(unsigned char reg_index, unsigned short value, tRioStatusCode *status) = 0; - virtual unsigned short readMXP(unsigned char reg_index, tRioStatusCode *status) = 0; - - -private: - tAO(const tAO&); - void operator=(const tAO&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_AO_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_AO_h__ +#define __nFRC_2017_17_0_2_AO_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tAO +{ +public: + tAO(){} + virtual ~tAO(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tAO* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + + + + + + typedef enum + { + kNumMXPRegisters = 2, + } tMXP_IfaceConstants; + + virtual void writeMXP(unsigned char reg_index, unsigned short value, tRioStatusCode *status) = 0; + virtual unsigned short readMXP(unsigned char reg_index, tRioStatusCode *status) = 0; + + +private: + tAO(const tAO&); + void operator=(const tAO&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_AO_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h index 62a3370a9f..203446d53d 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h @@ -1,103 +1,103 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Accel_h__ -#define __nFRC_2017_17_0_2_Accel_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tAccel -{ -public: - tAccel(){} - virtual ~tAccel(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tAccel* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - - - - typedef enum - { - } tSTAT_IfaceConstants; - - virtual unsigned char readSTAT(tRioStatusCode *status) = 0; - - - typedef enum - { - } tCNTR_IfaceConstants; - - virtual void writeCNTR(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readCNTR(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDATO_IfaceConstants; - - virtual void writeDATO(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readDATO(tRioStatusCode *status) = 0; - - - typedef enum - { - } tCNFG_IfaceConstants; - - virtual void writeCNFG(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readCNFG(tRioStatusCode *status) = 0; - - - typedef enum - { - } tCNTL_IfaceConstants; - - virtual void writeCNTL(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readCNTL(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDATI_IfaceConstants; - - virtual unsigned char readDATI(tRioStatusCode *status) = 0; - - - typedef enum - { - } tGO_IfaceConstants; - - virtual void strobeGO(tRioStatusCode *status) = 0; - - - typedef enum - { - } tADDR_IfaceConstants; - - virtual void writeADDR(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readADDR(tRioStatusCode *status) = 0; - - - - -private: - tAccel(const tAccel&); - void operator=(const tAccel&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Accel_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Accel_h__ +#define __nFRC_2017_17_0_2_Accel_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tAccel +{ +public: + tAccel(){} + virtual ~tAccel(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tAccel* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + + + + typedef enum + { + } tSTAT_IfaceConstants; + + virtual unsigned char readSTAT(tRioStatusCode *status) = 0; + + + typedef enum + { + } tCNTR_IfaceConstants; + + virtual void writeCNTR(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readCNTR(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDATO_IfaceConstants; + + virtual void writeDATO(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readDATO(tRioStatusCode *status) = 0; + + + typedef enum + { + } tCNFG_IfaceConstants; + + virtual void writeCNFG(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readCNFG(tRioStatusCode *status) = 0; + + + typedef enum + { + } tCNTL_IfaceConstants; + + virtual void writeCNTL(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readCNTL(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDATI_IfaceConstants; + + virtual unsigned char readDATI(tRioStatusCode *status) = 0; + + + typedef enum + { + } tGO_IfaceConstants; + + virtual void strobeGO(tRioStatusCode *status) = 0; + + + typedef enum + { + } tADDR_IfaceConstants; + + virtual void writeADDR(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readADDR(tRioStatusCode *status) = 0; + + + + +private: + tAccel(const tAccel&); + void operator=(const tAccel&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Accel_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h index e0215b2bee..d0c37dd583 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h @@ -1,88 +1,88 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Accumulator_h__ -#define __nFRC_2017_17_0_2_Accumulator_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tAccumulator -{ -public: - tAccumulator(){} - virtual ~tAccumulator(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tAccumulator* create(unsigned char sys_index, tRioStatusCode *status); - virtual unsigned char getSystemIndex() = 0; - - - typedef enum - { - kNumSystems = 2, - } tIfaceConstants; - - typedef - union{ - struct{ - signed long long Value; - unsigned Count : 32; - }; - struct{ - unsigned value : 32; - unsigned value2 : 32; - unsigned value3 : 32; - }; - } tOutput; - - - typedef enum - { - } tOutput_IfaceConstants; - - virtual tOutput readOutput(tRioStatusCode *status) = 0; - virtual signed long long readOutput_Value(tRioStatusCode *status) = 0; - virtual unsigned int readOutput_Count(tRioStatusCode *status) = 0; - - - typedef enum - { - } tCenter_IfaceConstants; - - virtual void writeCenter(signed int value, tRioStatusCode *status) = 0; - virtual signed int readCenter(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDeadband_IfaceConstants; - - virtual void writeDeadband(signed int value, tRioStatusCode *status) = 0; - virtual signed int readDeadband(tRioStatusCode *status) = 0; - - - typedef enum - { - } tReset_IfaceConstants; - - virtual void strobeReset(tRioStatusCode *status) = 0; - - - - - -private: - tAccumulator(const tAccumulator&); - void operator=(const tAccumulator&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Accumulator_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Accumulator_h__ +#define __nFRC_2017_17_0_2_Accumulator_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tAccumulator +{ +public: + tAccumulator(){} + virtual ~tAccumulator(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tAccumulator* create(unsigned char sys_index, tRioStatusCode *status); + virtual unsigned char getSystemIndex() = 0; + + + typedef enum + { + kNumSystems = 2, + } tIfaceConstants; + + typedef + union{ + struct{ + signed long long Value; + unsigned Count : 32; + }; + struct{ + unsigned value : 32; + unsigned value2 : 32; + unsigned value3 : 32; + }; + } tOutput; + + + typedef enum + { + } tOutput_IfaceConstants; + + virtual tOutput readOutput(tRioStatusCode *status) = 0; + virtual signed long long readOutput_Value(tRioStatusCode *status) = 0; + virtual unsigned int readOutput_Count(tRioStatusCode *status) = 0; + + + typedef enum + { + } tCenter_IfaceConstants; + + virtual void writeCenter(signed int value, tRioStatusCode *status) = 0; + virtual signed int readCenter(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDeadband_IfaceConstants; + + virtual void writeDeadband(signed int value, tRioStatusCode *status) = 0; + virtual signed int readDeadband(tRioStatusCode *status) = 0; + + + typedef enum + { + } tReset_IfaceConstants; + + virtual void strobeReset(tRioStatusCode *status) = 0; + + + + + +private: + tAccumulator(const tAccumulator&); + void operator=(const tAccumulator&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Accumulator_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h index 8f6452f685..6f51f19e7d 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h @@ -1,58 +1,58 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Alarm_h__ -#define __nFRC_2017_17_0_2_Alarm_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tAlarm -{ -public: - tAlarm(){} - virtual ~tAlarm(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tAlarm* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - - - - typedef enum - { - } tEnable_IfaceConstants; - - virtual void writeEnable(bool value, tRioStatusCode *status) = 0; - virtual bool readEnable(tRioStatusCode *status) = 0; - - - typedef enum - { - } tTriggerTime_IfaceConstants; - - virtual void writeTriggerTime(unsigned int value, tRioStatusCode *status) = 0; - virtual unsigned int readTriggerTime(tRioStatusCode *status) = 0; - - - - -private: - tAlarm(const tAlarm&); - void operator=(const tAlarm&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Alarm_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Alarm_h__ +#define __nFRC_2017_17_0_2_Alarm_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tAlarm +{ +public: + tAlarm(){} + virtual ~tAlarm(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tAlarm* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + + + + typedef enum + { + } tEnable_IfaceConstants; + + virtual void writeEnable(bool value, tRioStatusCode *status) = 0; + virtual bool readEnable(tRioStatusCode *status) = 0; + + + typedef enum + { + } tTriggerTime_IfaceConstants; + + virtual void writeTriggerTime(unsigned int value, tRioStatusCode *status) = 0; + virtual unsigned int readTriggerTime(tRioStatusCode *status) = 0; + + + + +private: + tAlarm(const tAlarm&); + void operator=(const tAlarm&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Alarm_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h index 65119b251c..9df8ed896f 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h @@ -1,130 +1,130 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_AnalogTrigger_h__ -#define __nFRC_2017_17_0_2_AnalogTrigger_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tAnalogTrigger -{ -public: - tAnalogTrigger(){} - virtual ~tAnalogTrigger(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tAnalogTrigger* create(unsigned char sys_index, tRioStatusCode *status); - virtual unsigned char getSystemIndex() = 0; - - - typedef enum - { - kNumSystems = 8, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned InHysteresis : 1; - unsigned OverLimit : 1; - unsigned Rising : 1; - unsigned Falling : 1; -#else - unsigned Falling : 1; - unsigned Rising : 1; - unsigned OverLimit : 1; - unsigned InHysteresis : 1; -#endif - }; - struct{ - unsigned value : 4; - }; - } tOutput; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Channel : 3; - unsigned Averaged : 1; - unsigned Filter : 1; - unsigned FloatingRollover : 1; - signed RolloverLimit : 8; -#else - signed RolloverLimit : 8; - unsigned FloatingRollover : 1; - unsigned Filter : 1; - unsigned Averaged : 1; - unsigned Channel : 3; -#endif - }; - struct{ - unsigned value : 14; - }; - } tSourceSelect; - - - typedef enum - { - } tSourceSelect_IfaceConstants; - - virtual void writeSourceSelect(tSourceSelect value, tRioStatusCode *status) = 0; - virtual void writeSourceSelect_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeSourceSelect_Averaged(bool value, tRioStatusCode *status) = 0; - virtual void writeSourceSelect_Filter(bool value, tRioStatusCode *status) = 0; - virtual void writeSourceSelect_FloatingRollover(bool value, tRioStatusCode *status) = 0; - virtual void writeSourceSelect_RolloverLimit(signed short value, tRioStatusCode *status) = 0; - virtual tSourceSelect readSourceSelect(tRioStatusCode *status) = 0; - virtual unsigned char readSourceSelect_Channel(tRioStatusCode *status) = 0; - virtual bool readSourceSelect_Averaged(tRioStatusCode *status) = 0; - virtual bool readSourceSelect_Filter(tRioStatusCode *status) = 0; - virtual bool readSourceSelect_FloatingRollover(tRioStatusCode *status) = 0; - virtual signed short readSourceSelect_RolloverLimit(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUpperLimit_IfaceConstants; - - virtual void writeUpperLimit(signed int value, tRioStatusCode *status) = 0; - virtual signed int readUpperLimit(tRioStatusCode *status) = 0; - - - typedef enum - { - } tLowerLimit_IfaceConstants; - - virtual void writeLowerLimit(signed int value, tRioStatusCode *status) = 0; - virtual signed int readLowerLimit(tRioStatusCode *status) = 0; - - - - typedef enum - { - kNumOutputElements = 8, - } tOutput_IfaceConstants; - - virtual tOutput readOutput(unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readOutput_InHysteresis(unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readOutput_OverLimit(unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readOutput_Rising(unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readOutput_Falling(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - - -private: - tAnalogTrigger(const tAnalogTrigger&); - void operator=(const tAnalogTrigger&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_AnalogTrigger_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_AnalogTrigger_h__ +#define __nFRC_2017_17_0_2_AnalogTrigger_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tAnalogTrigger +{ +public: + tAnalogTrigger(){} + virtual ~tAnalogTrigger(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tAnalogTrigger* create(unsigned char sys_index, tRioStatusCode *status); + virtual unsigned char getSystemIndex() = 0; + + + typedef enum + { + kNumSystems = 8, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned InHysteresis : 1; + unsigned OverLimit : 1; + unsigned Rising : 1; + unsigned Falling : 1; +#else + unsigned Falling : 1; + unsigned Rising : 1; + unsigned OverLimit : 1; + unsigned InHysteresis : 1; +#endif + }; + struct{ + unsigned value : 4; + }; + } tOutput; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Channel : 3; + unsigned Averaged : 1; + unsigned Filter : 1; + unsigned FloatingRollover : 1; + signed RolloverLimit : 8; +#else + signed RolloverLimit : 8; + unsigned FloatingRollover : 1; + unsigned Filter : 1; + unsigned Averaged : 1; + unsigned Channel : 3; +#endif + }; + struct{ + unsigned value : 14; + }; + } tSourceSelect; + + + typedef enum + { + } tSourceSelect_IfaceConstants; + + virtual void writeSourceSelect(tSourceSelect value, tRioStatusCode *status) = 0; + virtual void writeSourceSelect_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeSourceSelect_Averaged(bool value, tRioStatusCode *status) = 0; + virtual void writeSourceSelect_Filter(bool value, tRioStatusCode *status) = 0; + virtual void writeSourceSelect_FloatingRollover(bool value, tRioStatusCode *status) = 0; + virtual void writeSourceSelect_RolloverLimit(signed short value, tRioStatusCode *status) = 0; + virtual tSourceSelect readSourceSelect(tRioStatusCode *status) = 0; + virtual unsigned char readSourceSelect_Channel(tRioStatusCode *status) = 0; + virtual bool readSourceSelect_Averaged(tRioStatusCode *status) = 0; + virtual bool readSourceSelect_Filter(tRioStatusCode *status) = 0; + virtual bool readSourceSelect_FloatingRollover(tRioStatusCode *status) = 0; + virtual signed short readSourceSelect_RolloverLimit(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUpperLimit_IfaceConstants; + + virtual void writeUpperLimit(signed int value, tRioStatusCode *status) = 0; + virtual signed int readUpperLimit(tRioStatusCode *status) = 0; + + + typedef enum + { + } tLowerLimit_IfaceConstants; + + virtual void writeLowerLimit(signed int value, tRioStatusCode *status) = 0; + virtual signed int readLowerLimit(tRioStatusCode *status) = 0; + + + + typedef enum + { + kNumOutputElements = 8, + } tOutput_IfaceConstants; + + virtual tOutput readOutput(unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readOutput_InHysteresis(unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readOutput_OverLimit(unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readOutput_Rising(unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readOutput_Falling(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + + +private: + tAnalogTrigger(const tAnalogTrigger&); + void operator=(const tAnalogTrigger&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_AnalogTrigger_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h index c42d7b9f29..1b3fa43d33 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h @@ -1,91 +1,91 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_BIST_h__ -#define __nFRC_2017_17_0_2_BIST_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tBIST -{ -public: - tBIST(){} - virtual ~tBIST(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tBIST* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - - - - typedef enum - { - } tDO0SquareTicks_IfaceConstants; - - virtual void writeDO0SquareTicks(unsigned int value, tRioStatusCode *status) = 0; - virtual unsigned int readDO0SquareTicks(tRioStatusCode *status) = 0; - - - typedef enum - { - } tEnable_IfaceConstants; - - virtual void writeEnable(bool value, tRioStatusCode *status) = 0; - virtual bool readEnable(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDO1SquareEnable_IfaceConstants; - - virtual void writeDO1SquareEnable(bool value, tRioStatusCode *status) = 0; - virtual bool readDO1SquareEnable(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDO0SquareEnable_IfaceConstants; - - virtual void writeDO0SquareEnable(bool value, tRioStatusCode *status) = 0; - virtual bool readDO0SquareEnable(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDO1SquareTicks_IfaceConstants; - - virtual void writeDO1SquareTicks(unsigned int value, tRioStatusCode *status) = 0; - virtual unsigned int readDO1SquareTicks(tRioStatusCode *status) = 0; - - - - - typedef enum - { - kNumDORegisters = 2, - } tDO_IfaceConstants; - - virtual void writeDO(unsigned char reg_index, bool value, tRioStatusCode *status) = 0; - virtual bool readDO(unsigned char reg_index, tRioStatusCode *status) = 0; - - -private: - tBIST(const tBIST&); - void operator=(const tBIST&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_BIST_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_BIST_h__ +#define __nFRC_2017_17_0_2_BIST_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tBIST +{ +public: + tBIST(){} + virtual ~tBIST(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tBIST* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + + + + typedef enum + { + } tDO0SquareTicks_IfaceConstants; + + virtual void writeDO0SquareTicks(unsigned int value, tRioStatusCode *status) = 0; + virtual unsigned int readDO0SquareTicks(tRioStatusCode *status) = 0; + + + typedef enum + { + } tEnable_IfaceConstants; + + virtual void writeEnable(bool value, tRioStatusCode *status) = 0; + virtual bool readEnable(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDO1SquareEnable_IfaceConstants; + + virtual void writeDO1SquareEnable(bool value, tRioStatusCode *status) = 0; + virtual bool readDO1SquareEnable(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDO0SquareEnable_IfaceConstants; + + virtual void writeDO0SquareEnable(bool value, tRioStatusCode *status) = 0; + virtual bool readDO0SquareEnable(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDO1SquareTicks_IfaceConstants; + + virtual void writeDO1SquareTicks(unsigned int value, tRioStatusCode *status) = 0; + virtual unsigned int readDO1SquareTicks(tRioStatusCode *status) = 0; + + + + + typedef enum + { + kNumDORegisters = 2, + } tDO_IfaceConstants; + + virtual void writeDO(unsigned char reg_index, bool value, tRioStatusCode *status) = 0; + virtual bool readDO(unsigned char reg_index, tRioStatusCode *status) = 0; + + +private: + tBIST(const tBIST&); + void operator=(const tBIST&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_BIST_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h index f2986f50cf..baaf51683c 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h @@ -1,220 +1,220 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Counter_h__ -#define __nFRC_2017_17_0_2_Counter_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tCounter -{ -public: - tCounter(){} - virtual ~tCounter(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tCounter* create(unsigned char sys_index, tRioStatusCode *status); - virtual unsigned char getSystemIndex() = 0; - - - typedef enum - { - kNumSystems = 8, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Direction : 1; - signed Value : 31; -#else - signed Value : 31; - unsigned Direction : 1; -#endif - }; - struct{ - unsigned value : 32; - }; - } tOutput; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned UpSource_Channel : 4; - unsigned UpSource_Module : 1; - unsigned UpSource_AnalogTrigger : 1; - unsigned DownSource_Channel : 4; - unsigned DownSource_Module : 1; - unsigned DownSource_AnalogTrigger : 1; - unsigned IndexSource_Channel : 4; - unsigned IndexSource_Module : 1; - unsigned IndexSource_AnalogTrigger : 1; - unsigned IndexActiveHigh : 1; - unsigned IndexEdgeSensitive : 1; - unsigned UpRisingEdge : 1; - unsigned UpFallingEdge : 1; - unsigned DownRisingEdge : 1; - unsigned DownFallingEdge : 1; - unsigned Mode : 2; - unsigned PulseLengthThreshold : 6; -#else - unsigned PulseLengthThreshold : 6; - unsigned Mode : 2; - unsigned DownFallingEdge : 1; - unsigned DownRisingEdge : 1; - unsigned UpFallingEdge : 1; - unsigned UpRisingEdge : 1; - unsigned IndexEdgeSensitive : 1; - unsigned IndexActiveHigh : 1; - unsigned IndexSource_AnalogTrigger : 1; - unsigned IndexSource_Module : 1; - unsigned IndexSource_Channel : 4; - unsigned DownSource_AnalogTrigger : 1; - unsigned DownSource_Module : 1; - unsigned DownSource_Channel : 4; - unsigned UpSource_AnalogTrigger : 1; - unsigned UpSource_Module : 1; - unsigned UpSource_Channel : 4; -#endif - }; - struct{ - unsigned value : 32; - }; - } tConfig; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Period : 23; - signed Count : 8; - unsigned Stalled : 1; -#else - unsigned Stalled : 1; - signed Count : 8; - unsigned Period : 23; -#endif - }; - struct{ - unsigned value : 32; - }; - } tTimerOutput; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned StallPeriod : 24; - unsigned AverageSize : 7; - unsigned UpdateWhenEmpty : 1; -#else - unsigned UpdateWhenEmpty : 1; - unsigned AverageSize : 7; - unsigned StallPeriod : 24; -#endif - }; - struct{ - unsigned value : 32; - }; - } tTimerConfig; - - - typedef enum - { - } tOutput_IfaceConstants; - - virtual tOutput readOutput(tRioStatusCode *status) = 0; - virtual bool readOutput_Direction(tRioStatusCode *status) = 0; - virtual signed int readOutput_Value(tRioStatusCode *status) = 0; - - - typedef enum - { - } tConfig_IfaceConstants; - - virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; - virtual void writeConfig_UpSource_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_UpSource_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_UpSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_DownSource_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_DownSource_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_DownSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexSource_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexSource_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexActiveHigh(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexEdgeSensitive(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_UpRisingEdge(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_UpFallingEdge(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_DownRisingEdge(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_DownFallingEdge(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Mode(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_PulseLengthThreshold(unsigned short value, tRioStatusCode *status) = 0; - virtual tConfig readConfig(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_UpSource_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_UpSource_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_UpSource_AnalogTrigger(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_DownSource_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_DownSource_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_DownSource_AnalogTrigger(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_IndexSource_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_IndexSource_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_IndexSource_AnalogTrigger(tRioStatusCode *status) = 0; - virtual bool readConfig_IndexActiveHigh(tRioStatusCode *status) = 0; - virtual bool readConfig_IndexEdgeSensitive(tRioStatusCode *status) = 0; - virtual bool readConfig_UpRisingEdge(tRioStatusCode *status) = 0; - virtual bool readConfig_UpFallingEdge(tRioStatusCode *status) = 0; - virtual bool readConfig_DownRisingEdge(tRioStatusCode *status) = 0; - virtual bool readConfig_DownFallingEdge(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_Mode(tRioStatusCode *status) = 0; - virtual unsigned short readConfig_PulseLengthThreshold(tRioStatusCode *status) = 0; - - - typedef enum - { - } tTimerOutput_IfaceConstants; - - virtual tTimerOutput readTimerOutput(tRioStatusCode *status) = 0; - virtual unsigned int readTimerOutput_Period(tRioStatusCode *status) = 0; - virtual signed char readTimerOutput_Count(tRioStatusCode *status) = 0; - virtual bool readTimerOutput_Stalled(tRioStatusCode *status) = 0; - - - typedef enum - { - } tReset_IfaceConstants; - - virtual void strobeReset(tRioStatusCode *status) = 0; - - - typedef enum - { - } tTimerConfig_IfaceConstants; - - virtual void writeTimerConfig(tTimerConfig value, tRioStatusCode *status) = 0; - virtual void writeTimerConfig_StallPeriod(unsigned int value, tRioStatusCode *status) = 0; - virtual void writeTimerConfig_AverageSize(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeTimerConfig_UpdateWhenEmpty(bool value, tRioStatusCode *status) = 0; - virtual tTimerConfig readTimerConfig(tRioStatusCode *status) = 0; - virtual unsigned int readTimerConfig_StallPeriod(tRioStatusCode *status) = 0; - virtual unsigned char readTimerConfig_AverageSize(tRioStatusCode *status) = 0; - virtual bool readTimerConfig_UpdateWhenEmpty(tRioStatusCode *status) = 0; - - - - - -private: - tCounter(const tCounter&); - void operator=(const tCounter&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Counter_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Counter_h__ +#define __nFRC_2017_17_0_2_Counter_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tCounter +{ +public: + tCounter(){} + virtual ~tCounter(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tCounter* create(unsigned char sys_index, tRioStatusCode *status); + virtual unsigned char getSystemIndex() = 0; + + + typedef enum + { + kNumSystems = 8, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Direction : 1; + signed Value : 31; +#else + signed Value : 31; + unsigned Direction : 1; +#endif + }; + struct{ + unsigned value : 32; + }; + } tOutput; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned UpSource_Channel : 4; + unsigned UpSource_Module : 1; + unsigned UpSource_AnalogTrigger : 1; + unsigned DownSource_Channel : 4; + unsigned DownSource_Module : 1; + unsigned DownSource_AnalogTrigger : 1; + unsigned IndexSource_Channel : 4; + unsigned IndexSource_Module : 1; + unsigned IndexSource_AnalogTrigger : 1; + unsigned IndexActiveHigh : 1; + unsigned IndexEdgeSensitive : 1; + unsigned UpRisingEdge : 1; + unsigned UpFallingEdge : 1; + unsigned DownRisingEdge : 1; + unsigned DownFallingEdge : 1; + unsigned Mode : 2; + unsigned PulseLengthThreshold : 6; +#else + unsigned PulseLengthThreshold : 6; + unsigned Mode : 2; + unsigned DownFallingEdge : 1; + unsigned DownRisingEdge : 1; + unsigned UpFallingEdge : 1; + unsigned UpRisingEdge : 1; + unsigned IndexEdgeSensitive : 1; + unsigned IndexActiveHigh : 1; + unsigned IndexSource_AnalogTrigger : 1; + unsigned IndexSource_Module : 1; + unsigned IndexSource_Channel : 4; + unsigned DownSource_AnalogTrigger : 1; + unsigned DownSource_Module : 1; + unsigned DownSource_Channel : 4; + unsigned UpSource_AnalogTrigger : 1; + unsigned UpSource_Module : 1; + unsigned UpSource_Channel : 4; +#endif + }; + struct{ + unsigned value : 32; + }; + } tConfig; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Period : 23; + signed Count : 8; + unsigned Stalled : 1; +#else + unsigned Stalled : 1; + signed Count : 8; + unsigned Period : 23; +#endif + }; + struct{ + unsigned value : 32; + }; + } tTimerOutput; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned StallPeriod : 24; + unsigned AverageSize : 7; + unsigned UpdateWhenEmpty : 1; +#else + unsigned UpdateWhenEmpty : 1; + unsigned AverageSize : 7; + unsigned StallPeriod : 24; +#endif + }; + struct{ + unsigned value : 32; + }; + } tTimerConfig; + + + typedef enum + { + } tOutput_IfaceConstants; + + virtual tOutput readOutput(tRioStatusCode *status) = 0; + virtual bool readOutput_Direction(tRioStatusCode *status) = 0; + virtual signed int readOutput_Value(tRioStatusCode *status) = 0; + + + typedef enum + { + } tConfig_IfaceConstants; + + virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; + virtual void writeConfig_UpSource_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_UpSource_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_UpSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_DownSource_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_DownSource_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_DownSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexSource_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexSource_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexActiveHigh(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexEdgeSensitive(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_UpRisingEdge(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_UpFallingEdge(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_DownRisingEdge(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_DownFallingEdge(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Mode(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_PulseLengthThreshold(unsigned short value, tRioStatusCode *status) = 0; + virtual tConfig readConfig(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_UpSource_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_UpSource_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_UpSource_AnalogTrigger(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_DownSource_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_DownSource_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_DownSource_AnalogTrigger(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_IndexSource_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_IndexSource_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexSource_AnalogTrigger(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexActiveHigh(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexEdgeSensitive(tRioStatusCode *status) = 0; + virtual bool readConfig_UpRisingEdge(tRioStatusCode *status) = 0; + virtual bool readConfig_UpFallingEdge(tRioStatusCode *status) = 0; + virtual bool readConfig_DownRisingEdge(tRioStatusCode *status) = 0; + virtual bool readConfig_DownFallingEdge(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_Mode(tRioStatusCode *status) = 0; + virtual unsigned short readConfig_PulseLengthThreshold(tRioStatusCode *status) = 0; + + + typedef enum + { + } tTimerOutput_IfaceConstants; + + virtual tTimerOutput readTimerOutput(tRioStatusCode *status) = 0; + virtual unsigned int readTimerOutput_Period(tRioStatusCode *status) = 0; + virtual signed char readTimerOutput_Count(tRioStatusCode *status) = 0; + virtual bool readTimerOutput_Stalled(tRioStatusCode *status) = 0; + + + typedef enum + { + } tReset_IfaceConstants; + + virtual void strobeReset(tRioStatusCode *status) = 0; + + + typedef enum + { + } tTimerConfig_IfaceConstants; + + virtual void writeTimerConfig(tTimerConfig value, tRioStatusCode *status) = 0; + virtual void writeTimerConfig_StallPeriod(unsigned int value, tRioStatusCode *status) = 0; + virtual void writeTimerConfig_AverageSize(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeTimerConfig_UpdateWhenEmpty(bool value, tRioStatusCode *status) = 0; + virtual tTimerConfig readTimerConfig(tRioStatusCode *status) = 0; + virtual unsigned int readTimerConfig_StallPeriod(tRioStatusCode *status) = 0; + virtual unsigned char readTimerConfig_AverageSize(tRioStatusCode *status) = 0; + virtual bool readTimerConfig_UpdateWhenEmpty(tRioStatusCode *status) = 0; + + + + + +private: + tCounter(const tCounter&); + void operator=(const tCounter&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Counter_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h index 640d116b5b..6204e4cc27 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h @@ -1,264 +1,264 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_DIO_h__ -#define __nFRC_2017_17_0_2_DIO_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tDIO -{ -public: - tDIO(){} - virtual ~tDIO(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tDIO* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Headers : 10; - unsigned SPIPort : 5; - unsigned Reserved : 1; - unsigned MXP : 16; -#else - unsigned MXP : 16; - unsigned Reserved : 1; - unsigned SPIPort : 5; - unsigned Headers : 10; -#endif - }; - struct{ - unsigned value : 32; - }; - } tDO; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Headers : 10; - unsigned SPIPort : 5; - unsigned Reserved : 1; - unsigned MXP : 16; -#else - unsigned MXP : 16; - unsigned Reserved : 1; - unsigned SPIPort : 5; - unsigned Headers : 10; -#endif - }; - struct{ - unsigned value : 32; - }; - } tOutputEnable; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Headers : 10; - unsigned SPIPort : 5; - unsigned Reserved : 1; - unsigned MXP : 16; -#else - unsigned MXP : 16; - unsigned Reserved : 1; - unsigned SPIPort : 5; - unsigned Headers : 10; -#endif - }; - struct{ - unsigned value : 32; - }; - } tPulse; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Headers : 10; - unsigned SPIPort : 5; - unsigned Reserved : 1; - unsigned MXP : 16; -#else - unsigned MXP : 16; - unsigned Reserved : 1; - unsigned SPIPort : 5; - unsigned Headers : 10; -#endif - }; - struct{ - unsigned value : 32; - }; - } tDI; - - - - typedef enum - { - } tDO_IfaceConstants; - - virtual void writeDO(tDO value, tRioStatusCode *status) = 0; - virtual void writeDO_Headers(unsigned short value, tRioStatusCode *status) = 0; - virtual void writeDO_SPIPort(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeDO_Reserved(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeDO_MXP(unsigned short value, tRioStatusCode *status) = 0; - virtual tDO readDO(tRioStatusCode *status) = 0; - virtual unsigned short readDO_Headers(tRioStatusCode *status) = 0; - virtual unsigned char readDO_SPIPort(tRioStatusCode *status) = 0; - virtual unsigned char readDO_Reserved(tRioStatusCode *status) = 0; - virtual unsigned short readDO_MXP(tRioStatusCode *status) = 0; - - - typedef enum - { - kNumPWMDutyCycleAElements = 4, - } tPWMDutyCycleA_IfaceConstants; - - virtual void writePWMDutyCycleA(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readPWMDutyCycleA(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumPWMDutyCycleBElements = 2, - } tPWMDutyCycleB_IfaceConstants; - - virtual void writePWMDutyCycleB(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readPWMDutyCycleB(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumFilterSelectHdrElements = 16, - } tFilterSelectHdr_IfaceConstants; - - virtual void writeFilterSelectHdr(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readFilterSelectHdr(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - } tOutputEnable_IfaceConstants; - - virtual void writeOutputEnable(tOutputEnable value, tRioStatusCode *status) = 0; - virtual void writeOutputEnable_Headers(unsigned short value, tRioStatusCode *status) = 0; - virtual void writeOutputEnable_SPIPort(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeOutputEnable_Reserved(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeOutputEnable_MXP(unsigned short value, tRioStatusCode *status) = 0; - virtual tOutputEnable readOutputEnable(tRioStatusCode *status) = 0; - virtual unsigned short readOutputEnable_Headers(tRioStatusCode *status) = 0; - virtual unsigned char readOutputEnable_SPIPort(tRioStatusCode *status) = 0; - virtual unsigned char readOutputEnable_Reserved(tRioStatusCode *status) = 0; - virtual unsigned short readOutputEnable_MXP(tRioStatusCode *status) = 0; - - - typedef enum - { - kNumPWMOutputSelectElements = 6, - } tPWMOutputSelect_IfaceConstants; - - virtual void writePWMOutputSelect(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readPWMOutputSelect(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - } tPulse_IfaceConstants; - - virtual void writePulse(tPulse value, tRioStatusCode *status) = 0; - virtual void writePulse_Headers(unsigned short value, tRioStatusCode *status) = 0; - virtual void writePulse_SPIPort(unsigned char value, tRioStatusCode *status) = 0; - virtual void writePulse_Reserved(unsigned char value, tRioStatusCode *status) = 0; - virtual void writePulse_MXP(unsigned short value, tRioStatusCode *status) = 0; - virtual tPulse readPulse(tRioStatusCode *status) = 0; - virtual unsigned short readPulse_Headers(tRioStatusCode *status) = 0; - virtual unsigned char readPulse_SPIPort(tRioStatusCode *status) = 0; - virtual unsigned char readPulse_Reserved(tRioStatusCode *status) = 0; - virtual unsigned short readPulse_MXP(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDI_IfaceConstants; - - virtual tDI readDI(tRioStatusCode *status) = 0; - virtual unsigned short readDI_Headers(tRioStatusCode *status) = 0; - virtual unsigned char readDI_SPIPort(tRioStatusCode *status) = 0; - virtual unsigned char readDI_Reserved(tRioStatusCode *status) = 0; - virtual unsigned short readDI_MXP(tRioStatusCode *status) = 0; - - - typedef enum - { - } tEnableMXPSpecialFunction_IfaceConstants; - - virtual void writeEnableMXPSpecialFunction(unsigned short value, tRioStatusCode *status) = 0; - virtual unsigned short readEnableMXPSpecialFunction(tRioStatusCode *status) = 0; - - - typedef enum - { - kNumFilterSelectMXPElements = 16, - } tFilterSelectMXP_IfaceConstants; - - virtual void writeFilterSelectMXP(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readFilterSelectMXP(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - } tPulseLength_IfaceConstants; - - virtual void writePulseLength(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readPulseLength(tRioStatusCode *status) = 0; - - - typedef enum - { - } tPWMPeriodPower_IfaceConstants; - - virtual void writePWMPeriodPower(unsigned short value, tRioStatusCode *status) = 0; - virtual unsigned short readPWMPeriodPower(tRioStatusCode *status) = 0; - - - - - typedef enum - { - kNumFilterPeriodMXPRegisters = 3, - } tFilterPeriodMXP_IfaceConstants; - - virtual void writeFilterPeriodMXP(unsigned char reg_index, unsigned int value, tRioStatusCode *status) = 0; - virtual unsigned int readFilterPeriodMXP(unsigned char reg_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumFilterPeriodHdrRegisters = 3, - } tFilterPeriodHdr_IfaceConstants; - - virtual void writeFilterPeriodHdr(unsigned char reg_index, unsigned int value, tRioStatusCode *status) = 0; - virtual unsigned int readFilterPeriodHdr(unsigned char reg_index, tRioStatusCode *status) = 0; - - -private: - tDIO(const tDIO&); - void operator=(const tDIO&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_DIO_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_DIO_h__ +#define __nFRC_2017_17_0_2_DIO_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tDIO +{ +public: + tDIO(){} + virtual ~tDIO(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tDIO* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Headers : 10; + unsigned SPIPort : 5; + unsigned Reserved : 1; + unsigned MXP : 16; +#else + unsigned MXP : 16; + unsigned Reserved : 1; + unsigned SPIPort : 5; + unsigned Headers : 10; +#endif + }; + struct{ + unsigned value : 32; + }; + } tDO; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Headers : 10; + unsigned SPIPort : 5; + unsigned Reserved : 1; + unsigned MXP : 16; +#else + unsigned MXP : 16; + unsigned Reserved : 1; + unsigned SPIPort : 5; + unsigned Headers : 10; +#endif + }; + struct{ + unsigned value : 32; + }; + } tOutputEnable; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Headers : 10; + unsigned SPIPort : 5; + unsigned Reserved : 1; + unsigned MXP : 16; +#else + unsigned MXP : 16; + unsigned Reserved : 1; + unsigned SPIPort : 5; + unsigned Headers : 10; +#endif + }; + struct{ + unsigned value : 32; + }; + } tPulse; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Headers : 10; + unsigned SPIPort : 5; + unsigned Reserved : 1; + unsigned MXP : 16; +#else + unsigned MXP : 16; + unsigned Reserved : 1; + unsigned SPIPort : 5; + unsigned Headers : 10; +#endif + }; + struct{ + unsigned value : 32; + }; + } tDI; + + + + typedef enum + { + } tDO_IfaceConstants; + + virtual void writeDO(tDO value, tRioStatusCode *status) = 0; + virtual void writeDO_Headers(unsigned short value, tRioStatusCode *status) = 0; + virtual void writeDO_SPIPort(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeDO_Reserved(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeDO_MXP(unsigned short value, tRioStatusCode *status) = 0; + virtual tDO readDO(tRioStatusCode *status) = 0; + virtual unsigned short readDO_Headers(tRioStatusCode *status) = 0; + virtual unsigned char readDO_SPIPort(tRioStatusCode *status) = 0; + virtual unsigned char readDO_Reserved(tRioStatusCode *status) = 0; + virtual unsigned short readDO_MXP(tRioStatusCode *status) = 0; + + + typedef enum + { + kNumPWMDutyCycleAElements = 4, + } tPWMDutyCycleA_IfaceConstants; + + virtual void writePWMDutyCycleA(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readPWMDutyCycleA(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumPWMDutyCycleBElements = 2, + } tPWMDutyCycleB_IfaceConstants; + + virtual void writePWMDutyCycleB(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readPWMDutyCycleB(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumFilterSelectHdrElements = 16, + } tFilterSelectHdr_IfaceConstants; + + virtual void writeFilterSelectHdr(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readFilterSelectHdr(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + } tOutputEnable_IfaceConstants; + + virtual void writeOutputEnable(tOutputEnable value, tRioStatusCode *status) = 0; + virtual void writeOutputEnable_Headers(unsigned short value, tRioStatusCode *status) = 0; + virtual void writeOutputEnable_SPIPort(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeOutputEnable_Reserved(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeOutputEnable_MXP(unsigned short value, tRioStatusCode *status) = 0; + virtual tOutputEnable readOutputEnable(tRioStatusCode *status) = 0; + virtual unsigned short readOutputEnable_Headers(tRioStatusCode *status) = 0; + virtual unsigned char readOutputEnable_SPIPort(tRioStatusCode *status) = 0; + virtual unsigned char readOutputEnable_Reserved(tRioStatusCode *status) = 0; + virtual unsigned short readOutputEnable_MXP(tRioStatusCode *status) = 0; + + + typedef enum + { + kNumPWMOutputSelectElements = 6, + } tPWMOutputSelect_IfaceConstants; + + virtual void writePWMOutputSelect(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readPWMOutputSelect(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + } tPulse_IfaceConstants; + + virtual void writePulse(tPulse value, tRioStatusCode *status) = 0; + virtual void writePulse_Headers(unsigned short value, tRioStatusCode *status) = 0; + virtual void writePulse_SPIPort(unsigned char value, tRioStatusCode *status) = 0; + virtual void writePulse_Reserved(unsigned char value, tRioStatusCode *status) = 0; + virtual void writePulse_MXP(unsigned short value, tRioStatusCode *status) = 0; + virtual tPulse readPulse(tRioStatusCode *status) = 0; + virtual unsigned short readPulse_Headers(tRioStatusCode *status) = 0; + virtual unsigned char readPulse_SPIPort(tRioStatusCode *status) = 0; + virtual unsigned char readPulse_Reserved(tRioStatusCode *status) = 0; + virtual unsigned short readPulse_MXP(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDI_IfaceConstants; + + virtual tDI readDI(tRioStatusCode *status) = 0; + virtual unsigned short readDI_Headers(tRioStatusCode *status) = 0; + virtual unsigned char readDI_SPIPort(tRioStatusCode *status) = 0; + virtual unsigned char readDI_Reserved(tRioStatusCode *status) = 0; + virtual unsigned short readDI_MXP(tRioStatusCode *status) = 0; + + + typedef enum + { + } tEnableMXPSpecialFunction_IfaceConstants; + + virtual void writeEnableMXPSpecialFunction(unsigned short value, tRioStatusCode *status) = 0; + virtual unsigned short readEnableMXPSpecialFunction(tRioStatusCode *status) = 0; + + + typedef enum + { + kNumFilterSelectMXPElements = 16, + } tFilterSelectMXP_IfaceConstants; + + virtual void writeFilterSelectMXP(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readFilterSelectMXP(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + } tPulseLength_IfaceConstants; + + virtual void writePulseLength(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readPulseLength(tRioStatusCode *status) = 0; + + + typedef enum + { + } tPWMPeriodPower_IfaceConstants; + + virtual void writePWMPeriodPower(unsigned short value, tRioStatusCode *status) = 0; + virtual unsigned short readPWMPeriodPower(tRioStatusCode *status) = 0; + + + + + typedef enum + { + kNumFilterPeriodMXPRegisters = 3, + } tFilterPeriodMXP_IfaceConstants; + + virtual void writeFilterPeriodMXP(unsigned char reg_index, unsigned int value, tRioStatusCode *status) = 0; + virtual unsigned int readFilterPeriodMXP(unsigned char reg_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumFilterPeriodHdrRegisters = 3, + } tFilterPeriodHdr_IfaceConstants; + + virtual void writeFilterPeriodHdr(unsigned char reg_index, unsigned int value, tRioStatusCode *status) = 0; + virtual unsigned int readFilterPeriodHdr(unsigned char reg_index, tRioStatusCode *status) = 0; + + +private: + tDIO(const tDIO&); + void operator=(const tDIO&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_DIO_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h index 9f8e85d943..f5ce1c79db 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h @@ -1,198 +1,198 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_DMA_h__ -#define __nFRC_2017_17_0_2_DMA_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tDMA -{ -public: - tDMA(){} - virtual ~tDMA(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tDMA* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Pause : 1; - unsigned Enable_AI0_Low : 1; - unsigned Enable_AI0_High : 1; - unsigned Enable_AIAveraged0_Low : 1; - unsigned Enable_AIAveraged0_High : 1; - unsigned Enable_AI1_Low : 1; - unsigned Enable_AI1_High : 1; - unsigned Enable_AIAveraged1_Low : 1; - unsigned Enable_AIAveraged1_High : 1; - unsigned Enable_Accumulator0 : 1; - unsigned Enable_Accumulator1 : 1; - unsigned Enable_DI : 1; - unsigned Enable_AnalogTriggers : 1; - unsigned Enable_Counters_Low : 1; - unsigned Enable_Counters_High : 1; - unsigned Enable_CounterTimers_Low : 1; - unsigned Enable_CounterTimers_High : 1; - unsigned Enable_Encoders_Low : 1; - unsigned Enable_Encoders_High : 1; - unsigned Enable_EncoderTimers_Low : 1; - unsigned Enable_EncoderTimers_High : 1; - unsigned ExternalClock : 1; -#else - unsigned ExternalClock : 1; - unsigned Enable_EncoderTimers_High : 1; - unsigned Enable_EncoderTimers_Low : 1; - unsigned Enable_Encoders_High : 1; - unsigned Enable_Encoders_Low : 1; - unsigned Enable_CounterTimers_High : 1; - unsigned Enable_CounterTimers_Low : 1; - unsigned Enable_Counters_High : 1; - unsigned Enable_Counters_Low : 1; - unsigned Enable_AnalogTriggers : 1; - unsigned Enable_DI : 1; - unsigned Enable_Accumulator1 : 1; - unsigned Enable_Accumulator0 : 1; - unsigned Enable_AIAveraged1_High : 1; - unsigned Enable_AIAveraged1_Low : 1; - unsigned Enable_AI1_High : 1; - unsigned Enable_AI1_Low : 1; - unsigned Enable_AIAveraged0_High : 1; - unsigned Enable_AIAveraged0_Low : 1; - unsigned Enable_AI0_High : 1; - unsigned Enable_AI0_Low : 1; - unsigned Pause : 1; -#endif - }; - struct{ - unsigned value : 22; - }; - } tConfig; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned ExternalClockSource_Channel : 4; - unsigned ExternalClockSource_Module : 1; - unsigned ExternalClockSource_AnalogTrigger : 1; - unsigned RisingEdge : 1; - unsigned FallingEdge : 1; -#else - unsigned FallingEdge : 1; - unsigned RisingEdge : 1; - unsigned ExternalClockSource_AnalogTrigger : 1; - unsigned ExternalClockSource_Module : 1; - unsigned ExternalClockSource_Channel : 4; -#endif - }; - struct{ - unsigned value : 8; - }; - } tExternalTriggers; - - - - typedef enum - { - } tRate_IfaceConstants; - - virtual void writeRate(unsigned int value, tRioStatusCode *status) = 0; - virtual unsigned int readRate(tRioStatusCode *status) = 0; - - - typedef enum - { - } tConfig_IfaceConstants; - - virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; - virtual void writeConfig_Pause(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AI0_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AI0_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AIAveraged0_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AIAveraged0_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AI1_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AI1_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AIAveraged1_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AIAveraged1_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_Accumulator0(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_Accumulator1(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_DI(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_AnalogTriggers(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_Counters_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_Counters_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_CounterTimers_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_CounterTimers_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_Encoders_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_Encoders_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_EncoderTimers_Low(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Enable_EncoderTimers_High(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_ExternalClock(bool value, tRioStatusCode *status) = 0; - virtual tConfig readConfig(tRioStatusCode *status) = 0; - virtual bool readConfig_Pause(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AI0_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AI0_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AIAveraged0_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AIAveraged0_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AI1_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AI1_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AIAveraged1_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AIAveraged1_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_Accumulator0(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_Accumulator1(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_DI(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_AnalogTriggers(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_Counters_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_Counters_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_CounterTimers_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_CounterTimers_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_Encoders_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_Encoders_High(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_EncoderTimers_Low(tRioStatusCode *status) = 0; - virtual bool readConfig_Enable_EncoderTimers_High(tRioStatusCode *status) = 0; - virtual bool readConfig_ExternalClock(tRioStatusCode *status) = 0; - - - - - typedef enum - { - kNumExternalTriggersRegisters = 2, - kNumExternalTriggersElements = 4, - } tExternalTriggers_IfaceConstants; - - virtual void writeExternalTriggers(unsigned char reg_index, unsigned char bitfield_index, tExternalTriggers value, tRioStatusCode *status) = 0; - virtual void writeExternalTriggers_ExternalClockSource_Channel(unsigned char reg_index, unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual void writeExternalTriggers_ExternalClockSource_Module(unsigned char reg_index, unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual void writeExternalTriggers_ExternalClockSource_AnalogTrigger(unsigned char reg_index, unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; - virtual void writeExternalTriggers_RisingEdge(unsigned char reg_index, unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; - virtual void writeExternalTriggers_FallingEdge(unsigned char reg_index, unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; - virtual tExternalTriggers readExternalTriggers(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual unsigned char readExternalTriggers_ExternalClockSource_Channel(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual unsigned char readExternalTriggers_ExternalClockSource_Module(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readExternalTriggers_ExternalClockSource_AnalogTrigger(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readExternalTriggers_RisingEdge(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; - virtual bool readExternalTriggers_FallingEdge(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; - - -private: - tDMA(const tDMA&); - void operator=(const tDMA&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_DMA_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_DMA_h__ +#define __nFRC_2017_17_0_2_DMA_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tDMA +{ +public: + tDMA(){} + virtual ~tDMA(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tDMA* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Pause : 1; + unsigned Enable_AI0_Low : 1; + unsigned Enable_AI0_High : 1; + unsigned Enable_AIAveraged0_Low : 1; + unsigned Enable_AIAveraged0_High : 1; + unsigned Enable_AI1_Low : 1; + unsigned Enable_AI1_High : 1; + unsigned Enable_AIAveraged1_Low : 1; + unsigned Enable_AIAveraged1_High : 1; + unsigned Enable_Accumulator0 : 1; + unsigned Enable_Accumulator1 : 1; + unsigned Enable_DI : 1; + unsigned Enable_AnalogTriggers : 1; + unsigned Enable_Counters_Low : 1; + unsigned Enable_Counters_High : 1; + unsigned Enable_CounterTimers_Low : 1; + unsigned Enable_CounterTimers_High : 1; + unsigned Enable_Encoders_Low : 1; + unsigned Enable_Encoders_High : 1; + unsigned Enable_EncoderTimers_Low : 1; + unsigned Enable_EncoderTimers_High : 1; + unsigned ExternalClock : 1; +#else + unsigned ExternalClock : 1; + unsigned Enable_EncoderTimers_High : 1; + unsigned Enable_EncoderTimers_Low : 1; + unsigned Enable_Encoders_High : 1; + unsigned Enable_Encoders_Low : 1; + unsigned Enable_CounterTimers_High : 1; + unsigned Enable_CounterTimers_Low : 1; + unsigned Enable_Counters_High : 1; + unsigned Enable_Counters_Low : 1; + unsigned Enable_AnalogTriggers : 1; + unsigned Enable_DI : 1; + unsigned Enable_Accumulator1 : 1; + unsigned Enable_Accumulator0 : 1; + unsigned Enable_AIAveraged1_High : 1; + unsigned Enable_AIAveraged1_Low : 1; + unsigned Enable_AI1_High : 1; + unsigned Enable_AI1_Low : 1; + unsigned Enable_AIAveraged0_High : 1; + unsigned Enable_AIAveraged0_Low : 1; + unsigned Enable_AI0_High : 1; + unsigned Enable_AI0_Low : 1; + unsigned Pause : 1; +#endif + }; + struct{ + unsigned value : 22; + }; + } tConfig; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned ExternalClockSource_Channel : 4; + unsigned ExternalClockSource_Module : 1; + unsigned ExternalClockSource_AnalogTrigger : 1; + unsigned RisingEdge : 1; + unsigned FallingEdge : 1; +#else + unsigned FallingEdge : 1; + unsigned RisingEdge : 1; + unsigned ExternalClockSource_AnalogTrigger : 1; + unsigned ExternalClockSource_Module : 1; + unsigned ExternalClockSource_Channel : 4; +#endif + }; + struct{ + unsigned value : 8; + }; + } tExternalTriggers; + + + + typedef enum + { + } tRate_IfaceConstants; + + virtual void writeRate(unsigned int value, tRioStatusCode *status) = 0; + virtual unsigned int readRate(tRioStatusCode *status) = 0; + + + typedef enum + { + } tConfig_IfaceConstants; + + virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; + virtual void writeConfig_Pause(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AI0_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AI0_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AIAveraged0_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AIAveraged0_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AI1_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AI1_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AIAveraged1_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AIAveraged1_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_Accumulator0(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_Accumulator1(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_DI(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_AnalogTriggers(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_Counters_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_Counters_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_CounterTimers_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_CounterTimers_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_Encoders_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_Encoders_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_EncoderTimers_Low(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Enable_EncoderTimers_High(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_ExternalClock(bool value, tRioStatusCode *status) = 0; + virtual tConfig readConfig(tRioStatusCode *status) = 0; + virtual bool readConfig_Pause(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AI0_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AI0_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AIAveraged0_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AIAveraged0_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AI1_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AI1_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AIAveraged1_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AIAveraged1_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_Accumulator0(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_Accumulator1(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_DI(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_AnalogTriggers(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_Counters_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_Counters_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_CounterTimers_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_CounterTimers_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_Encoders_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_Encoders_High(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_EncoderTimers_Low(tRioStatusCode *status) = 0; + virtual bool readConfig_Enable_EncoderTimers_High(tRioStatusCode *status) = 0; + virtual bool readConfig_ExternalClock(tRioStatusCode *status) = 0; + + + + + typedef enum + { + kNumExternalTriggersRegisters = 2, + kNumExternalTriggersElements = 4, + } tExternalTriggers_IfaceConstants; + + virtual void writeExternalTriggers(unsigned char reg_index, unsigned char bitfield_index, tExternalTriggers value, tRioStatusCode *status) = 0; + virtual void writeExternalTriggers_ExternalClockSource_Channel(unsigned char reg_index, unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual void writeExternalTriggers_ExternalClockSource_Module(unsigned char reg_index, unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual void writeExternalTriggers_ExternalClockSource_AnalogTrigger(unsigned char reg_index, unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; + virtual void writeExternalTriggers_RisingEdge(unsigned char reg_index, unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; + virtual void writeExternalTriggers_FallingEdge(unsigned char reg_index, unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; + virtual tExternalTriggers readExternalTriggers(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual unsigned char readExternalTriggers_ExternalClockSource_Channel(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual unsigned char readExternalTriggers_ExternalClockSource_Module(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readExternalTriggers_ExternalClockSource_AnalogTrigger(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readExternalTriggers_RisingEdge(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; + virtual bool readExternalTriggers_FallingEdge(unsigned char reg_index, unsigned char bitfield_index, tRioStatusCode *status) = 0; + + +private: + tDMA(const tDMA&); + void operator=(const tDMA&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_DMA_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h index d558c4da14..cb75707064 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h @@ -1,200 +1,200 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Encoder_h__ -#define __nFRC_2017_17_0_2_Encoder_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tEncoder -{ -public: - tEncoder(){} - virtual ~tEncoder(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tEncoder* create(unsigned char sys_index, tRioStatusCode *status); - virtual unsigned char getSystemIndex() = 0; - - - typedef enum - { - kNumSystems = 8, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Direction : 1; - signed Value : 31; -#else - signed Value : 31; - unsigned Direction : 1; -#endif - }; - struct{ - unsigned value : 32; - }; - } tOutput; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned ASource_Channel : 4; - unsigned ASource_Module : 1; - unsigned ASource_AnalogTrigger : 1; - unsigned BSource_Channel : 4; - unsigned BSource_Module : 1; - unsigned BSource_AnalogTrigger : 1; - unsigned IndexSource_Channel : 4; - unsigned IndexSource_Module : 1; - unsigned IndexSource_AnalogTrigger : 1; - unsigned IndexActiveHigh : 1; - unsigned IndexEdgeSensitive : 1; - unsigned Reverse : 1; -#else - unsigned Reverse : 1; - unsigned IndexEdgeSensitive : 1; - unsigned IndexActiveHigh : 1; - unsigned IndexSource_AnalogTrigger : 1; - unsigned IndexSource_Module : 1; - unsigned IndexSource_Channel : 4; - unsigned BSource_AnalogTrigger : 1; - unsigned BSource_Module : 1; - unsigned BSource_Channel : 4; - unsigned ASource_AnalogTrigger : 1; - unsigned ASource_Module : 1; - unsigned ASource_Channel : 4; -#endif - }; - struct{ - unsigned value : 21; - }; - } tConfig; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Period : 23; - signed Count : 8; - unsigned Stalled : 1; -#else - unsigned Stalled : 1; - signed Count : 8; - unsigned Period : 23; -#endif - }; - struct{ - unsigned value : 32; - }; - } tTimerOutput; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned StallPeriod : 24; - unsigned AverageSize : 7; - unsigned UpdateWhenEmpty : 1; -#else - unsigned UpdateWhenEmpty : 1; - unsigned AverageSize : 7; - unsigned StallPeriod : 24; -#endif - }; - struct{ - unsigned value : 32; - }; - } tTimerConfig; - - - typedef enum - { - } tOutput_IfaceConstants; - - virtual tOutput readOutput(tRioStatusCode *status) = 0; - virtual bool readOutput_Direction(tRioStatusCode *status) = 0; - virtual signed int readOutput_Value(tRioStatusCode *status) = 0; - - - typedef enum - { - } tConfig_IfaceConstants; - - virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; - virtual void writeConfig_ASource_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_ASource_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_ASource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_BSource_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_BSource_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_BSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexSource_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexSource_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexActiveHigh(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_IndexEdgeSensitive(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_Reverse(bool value, tRioStatusCode *status) = 0; - virtual tConfig readConfig(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_ASource_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_ASource_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_ASource_AnalogTrigger(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_BSource_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_BSource_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_BSource_AnalogTrigger(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_IndexSource_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_IndexSource_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_IndexSource_AnalogTrigger(tRioStatusCode *status) = 0; - virtual bool readConfig_IndexActiveHigh(tRioStatusCode *status) = 0; - virtual bool readConfig_IndexEdgeSensitive(tRioStatusCode *status) = 0; - virtual bool readConfig_Reverse(tRioStatusCode *status) = 0; - - - typedef enum - { - } tTimerOutput_IfaceConstants; - - virtual tTimerOutput readTimerOutput(tRioStatusCode *status) = 0; - virtual unsigned int readTimerOutput_Period(tRioStatusCode *status) = 0; - virtual signed char readTimerOutput_Count(tRioStatusCode *status) = 0; - virtual bool readTimerOutput_Stalled(tRioStatusCode *status) = 0; - - - typedef enum - { - } tReset_IfaceConstants; - - virtual void strobeReset(tRioStatusCode *status) = 0; - - - typedef enum - { - } tTimerConfig_IfaceConstants; - - virtual void writeTimerConfig(tTimerConfig value, tRioStatusCode *status) = 0; - virtual void writeTimerConfig_StallPeriod(unsigned int value, tRioStatusCode *status) = 0; - virtual void writeTimerConfig_AverageSize(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeTimerConfig_UpdateWhenEmpty(bool value, tRioStatusCode *status) = 0; - virtual tTimerConfig readTimerConfig(tRioStatusCode *status) = 0; - virtual unsigned int readTimerConfig_StallPeriod(tRioStatusCode *status) = 0; - virtual unsigned char readTimerConfig_AverageSize(tRioStatusCode *status) = 0; - virtual bool readTimerConfig_UpdateWhenEmpty(tRioStatusCode *status) = 0; - - - - - -private: - tEncoder(const tEncoder&); - void operator=(const tEncoder&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Encoder_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Encoder_h__ +#define __nFRC_2017_17_0_2_Encoder_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tEncoder +{ +public: + tEncoder(){} + virtual ~tEncoder(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tEncoder* create(unsigned char sys_index, tRioStatusCode *status); + virtual unsigned char getSystemIndex() = 0; + + + typedef enum + { + kNumSystems = 8, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Direction : 1; + signed Value : 31; +#else + signed Value : 31; + unsigned Direction : 1; +#endif + }; + struct{ + unsigned value : 32; + }; + } tOutput; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned ASource_Channel : 4; + unsigned ASource_Module : 1; + unsigned ASource_AnalogTrigger : 1; + unsigned BSource_Channel : 4; + unsigned BSource_Module : 1; + unsigned BSource_AnalogTrigger : 1; + unsigned IndexSource_Channel : 4; + unsigned IndexSource_Module : 1; + unsigned IndexSource_AnalogTrigger : 1; + unsigned IndexActiveHigh : 1; + unsigned IndexEdgeSensitive : 1; + unsigned Reverse : 1; +#else + unsigned Reverse : 1; + unsigned IndexEdgeSensitive : 1; + unsigned IndexActiveHigh : 1; + unsigned IndexSource_AnalogTrigger : 1; + unsigned IndexSource_Module : 1; + unsigned IndexSource_Channel : 4; + unsigned BSource_AnalogTrigger : 1; + unsigned BSource_Module : 1; + unsigned BSource_Channel : 4; + unsigned ASource_AnalogTrigger : 1; + unsigned ASource_Module : 1; + unsigned ASource_Channel : 4; +#endif + }; + struct{ + unsigned value : 21; + }; + } tConfig; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Period : 23; + signed Count : 8; + unsigned Stalled : 1; +#else + unsigned Stalled : 1; + signed Count : 8; + unsigned Period : 23; +#endif + }; + struct{ + unsigned value : 32; + }; + } tTimerOutput; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned StallPeriod : 24; + unsigned AverageSize : 7; + unsigned UpdateWhenEmpty : 1; +#else + unsigned UpdateWhenEmpty : 1; + unsigned AverageSize : 7; + unsigned StallPeriod : 24; +#endif + }; + struct{ + unsigned value : 32; + }; + } tTimerConfig; + + + typedef enum + { + } tOutput_IfaceConstants; + + virtual tOutput readOutput(tRioStatusCode *status) = 0; + virtual bool readOutput_Direction(tRioStatusCode *status) = 0; + virtual signed int readOutput_Value(tRioStatusCode *status) = 0; + + + typedef enum + { + } tConfig_IfaceConstants; + + virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; + virtual void writeConfig_ASource_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_ASource_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_ASource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_BSource_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_BSource_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_BSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexSource_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexSource_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexSource_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexActiveHigh(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_IndexEdgeSensitive(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_Reverse(bool value, tRioStatusCode *status) = 0; + virtual tConfig readConfig(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_ASource_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_ASource_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_ASource_AnalogTrigger(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_BSource_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_BSource_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_BSource_AnalogTrigger(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_IndexSource_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_IndexSource_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexSource_AnalogTrigger(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexActiveHigh(tRioStatusCode *status) = 0; + virtual bool readConfig_IndexEdgeSensitive(tRioStatusCode *status) = 0; + virtual bool readConfig_Reverse(tRioStatusCode *status) = 0; + + + typedef enum + { + } tTimerOutput_IfaceConstants; + + virtual tTimerOutput readTimerOutput(tRioStatusCode *status) = 0; + virtual unsigned int readTimerOutput_Period(tRioStatusCode *status) = 0; + virtual signed char readTimerOutput_Count(tRioStatusCode *status) = 0; + virtual bool readTimerOutput_Stalled(tRioStatusCode *status) = 0; + + + typedef enum + { + } tReset_IfaceConstants; + + virtual void strobeReset(tRioStatusCode *status) = 0; + + + typedef enum + { + } tTimerConfig_IfaceConstants; + + virtual void writeTimerConfig(tTimerConfig value, tRioStatusCode *status) = 0; + virtual void writeTimerConfig_StallPeriod(unsigned int value, tRioStatusCode *status) = 0; + virtual void writeTimerConfig_AverageSize(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeTimerConfig_UpdateWhenEmpty(bool value, tRioStatusCode *status) = 0; + virtual tTimerConfig readTimerConfig(tRioStatusCode *status) = 0; + virtual unsigned int readTimerConfig_StallPeriod(tRioStatusCode *status) = 0; + virtual unsigned char readTimerConfig_AverageSize(tRioStatusCode *status) = 0; + virtual bool readTimerConfig_UpdateWhenEmpty(tRioStatusCode *status) = 0; + + + + + +private: + tEncoder(const tEncoder&); + void operator=(const tEncoder&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Encoder_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h index 792882805b..019f9d48be 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h @@ -1,101 +1,101 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Global_h__ -#define __nFRC_2017_17_0_2_Global_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tGlobal -{ -public: - tGlobal(){} - virtual ~tGlobal(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tGlobal* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Comm : 8; - unsigned Mode : 8; - unsigned RSL : 1; -#else - unsigned RSL : 1; - unsigned Mode : 8; - unsigned Comm : 8; -#endif - }; - struct{ - unsigned value : 17; - }; - } tLEDs; - - - - typedef enum - { - } tLEDs_IfaceConstants; - - virtual void writeLEDs(tLEDs value, tRioStatusCode *status) = 0; - virtual void writeLEDs_Comm(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeLEDs_Mode(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeLEDs_RSL(bool value, tRioStatusCode *status) = 0; - virtual tLEDs readLEDs(tRioStatusCode *status) = 0; - virtual unsigned char readLEDs_Comm(tRioStatusCode *status) = 0; - virtual unsigned char readLEDs_Mode(tRioStatusCode *status) = 0; - virtual bool readLEDs_RSL(tRioStatusCode *status) = 0; - - - typedef enum - { - } tVersion_IfaceConstants; - - virtual unsigned short readVersion(tRioStatusCode *status) = 0; - - - typedef enum - { - } tLocalTime_IfaceConstants; - - virtual unsigned int readLocalTime(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUserButton_IfaceConstants; - - virtual bool readUserButton(tRioStatusCode *status) = 0; - - - typedef enum - { - } tRevision_IfaceConstants; - - virtual unsigned int readRevision(tRioStatusCode *status) = 0; - - - - -private: - tGlobal(const tGlobal&); - void operator=(const tGlobal&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Global_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Global_h__ +#define __nFRC_2017_17_0_2_Global_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tGlobal +{ +public: + tGlobal(){} + virtual ~tGlobal(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tGlobal* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Comm : 8; + unsigned Mode : 8; + unsigned RSL : 1; +#else + unsigned RSL : 1; + unsigned Mode : 8; + unsigned Comm : 8; +#endif + }; + struct{ + unsigned value : 17; + }; + } tLEDs; + + + + typedef enum + { + } tLEDs_IfaceConstants; + + virtual void writeLEDs(tLEDs value, tRioStatusCode *status) = 0; + virtual void writeLEDs_Comm(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeLEDs_Mode(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeLEDs_RSL(bool value, tRioStatusCode *status) = 0; + virtual tLEDs readLEDs(tRioStatusCode *status) = 0; + virtual unsigned char readLEDs_Comm(tRioStatusCode *status) = 0; + virtual unsigned char readLEDs_Mode(tRioStatusCode *status) = 0; + virtual bool readLEDs_RSL(tRioStatusCode *status) = 0; + + + typedef enum + { + } tVersion_IfaceConstants; + + virtual unsigned short readVersion(tRioStatusCode *status) = 0; + + + typedef enum + { + } tLocalTime_IfaceConstants; + + virtual unsigned int readLocalTime(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUserButton_IfaceConstants; + + virtual bool readUserButton(tRioStatusCode *status) = 0; + + + typedef enum + { + } tRevision_IfaceConstants; + + virtual unsigned int readRevision(tRioStatusCode *status) = 0; + + + + +private: + tGlobal(const tGlobal&); + void operator=(const tGlobal&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Global_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h index 7a9d86cbda..af0ea32c60 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h @@ -1,101 +1,101 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Interrupt_h__ -#define __nFRC_2017_17_0_2_Interrupt_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tInterrupt -{ -public: - tInterrupt(){} - virtual ~tInterrupt(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tInterrupt* create(unsigned char sys_index, tRioStatusCode *status); - virtual unsigned char getSystemIndex() = 0; - - - typedef enum - { - kNumSystems = 8, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Source_Channel : 4; - unsigned Source_Module : 1; - unsigned Source_AnalogTrigger : 1; - unsigned RisingEdge : 1; - unsigned FallingEdge : 1; - unsigned WaitForAck : 1; -#else - unsigned WaitForAck : 1; - unsigned FallingEdge : 1; - unsigned RisingEdge : 1; - unsigned Source_AnalogTrigger : 1; - unsigned Source_Module : 1; - unsigned Source_Channel : 4; -#endif - }; - struct{ - unsigned value : 9; - }; - } tConfig; - - - typedef enum - { - } tFallingTimeStamp_IfaceConstants; - - virtual unsigned int readFallingTimeStamp(tRioStatusCode *status) = 0; - - - typedef enum - { - } tConfig_IfaceConstants; - - virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; - virtual void writeConfig_Source_Channel(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_Source_Module(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeConfig_Source_AnalogTrigger(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_RisingEdge(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_FallingEdge(bool value, tRioStatusCode *status) = 0; - virtual void writeConfig_WaitForAck(bool value, tRioStatusCode *status) = 0; - virtual tConfig readConfig(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_Source_Channel(tRioStatusCode *status) = 0; - virtual unsigned char readConfig_Source_Module(tRioStatusCode *status) = 0; - virtual bool readConfig_Source_AnalogTrigger(tRioStatusCode *status) = 0; - virtual bool readConfig_RisingEdge(tRioStatusCode *status) = 0; - virtual bool readConfig_FallingEdge(tRioStatusCode *status) = 0; - virtual bool readConfig_WaitForAck(tRioStatusCode *status) = 0; - - - typedef enum - { - } tRisingTimeStamp_IfaceConstants; - - virtual unsigned int readRisingTimeStamp(tRioStatusCode *status) = 0; - - - - - -private: - tInterrupt(const tInterrupt&); - void operator=(const tInterrupt&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Interrupt_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Interrupt_h__ +#define __nFRC_2017_17_0_2_Interrupt_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tInterrupt +{ +public: + tInterrupt(){} + virtual ~tInterrupt(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tInterrupt* create(unsigned char sys_index, tRioStatusCode *status); + virtual unsigned char getSystemIndex() = 0; + + + typedef enum + { + kNumSystems = 8, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Source_Channel : 4; + unsigned Source_Module : 1; + unsigned Source_AnalogTrigger : 1; + unsigned RisingEdge : 1; + unsigned FallingEdge : 1; + unsigned WaitForAck : 1; +#else + unsigned WaitForAck : 1; + unsigned FallingEdge : 1; + unsigned RisingEdge : 1; + unsigned Source_AnalogTrigger : 1; + unsigned Source_Module : 1; + unsigned Source_Channel : 4; +#endif + }; + struct{ + unsigned value : 9; + }; + } tConfig; + + + typedef enum + { + } tFallingTimeStamp_IfaceConstants; + + virtual unsigned int readFallingTimeStamp(tRioStatusCode *status) = 0; + + + typedef enum + { + } tConfig_IfaceConstants; + + virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; + virtual void writeConfig_Source_Channel(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_Source_Module(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeConfig_Source_AnalogTrigger(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_RisingEdge(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_FallingEdge(bool value, tRioStatusCode *status) = 0; + virtual void writeConfig_WaitForAck(bool value, tRioStatusCode *status) = 0; + virtual tConfig readConfig(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_Source_Channel(tRioStatusCode *status) = 0; + virtual unsigned char readConfig_Source_Module(tRioStatusCode *status) = 0; + virtual bool readConfig_Source_AnalogTrigger(tRioStatusCode *status) = 0; + virtual bool readConfig_RisingEdge(tRioStatusCode *status) = 0; + virtual bool readConfig_FallingEdge(tRioStatusCode *status) = 0; + virtual bool readConfig_WaitForAck(tRioStatusCode *status) = 0; + + + typedef enum + { + } tRisingTimeStamp_IfaceConstants; + + virtual unsigned int readRisingTimeStamp(tRioStatusCode *status) = 0; + + + + + +private: + tInterrupt(const tInterrupt&); + void operator=(const tInterrupt&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Interrupt_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h index 3200b34fe2..44e8971e7d 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h @@ -1,121 +1,121 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_PWM_h__ -#define __nFRC_2017_17_0_2_PWM_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tPWM -{ -public: - tPWM(){} - virtual ~tPWM(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tPWM* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Period : 16; - unsigned MinHigh : 16; -#else - unsigned MinHigh : 16; - unsigned Period : 16; -#endif - }; - struct{ - unsigned value : 32; - }; - } tConfig; - - - - typedef enum - { - } tConfig_IfaceConstants; - - virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; - virtual void writeConfig_Period(unsigned short value, tRioStatusCode *status) = 0; - virtual void writeConfig_MinHigh(unsigned short value, tRioStatusCode *status) = 0; - virtual tConfig readConfig(tRioStatusCode *status) = 0; - virtual unsigned short readConfig_Period(tRioStatusCode *status) = 0; - virtual unsigned short readConfig_MinHigh(tRioStatusCode *status) = 0; - - - typedef enum - { - } tLoopTiming_IfaceConstants; - - virtual unsigned short readLoopTiming(tRioStatusCode *status) = 0; - - - typedef enum - { - kNumPeriodScaleMXPElements = 10, - } tPeriodScaleMXP_IfaceConstants; - - virtual void writePeriodScaleMXP(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readPeriodScaleMXP(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumPeriodScaleHdrElements = 10, - } tPeriodScaleHdr_IfaceConstants; - - virtual void writePeriodScaleHdr(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readPeriodScaleHdr(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumZeroLatchElements = 20, - } tZeroLatch_IfaceConstants; - - virtual void writeZeroLatch(unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; - virtual bool readZeroLatch(unsigned char bitfield_index, tRioStatusCode *status) = 0; - - - - - typedef enum - { - kNumHdrRegisters = 10, - } tHdr_IfaceConstants; - - virtual void writeHdr(unsigned char reg_index, unsigned short value, tRioStatusCode *status) = 0; - virtual unsigned short readHdr(unsigned char reg_index, tRioStatusCode *status) = 0; - - - typedef enum - { - kNumMXPRegisters = 10, - } tMXP_IfaceConstants; - - virtual void writeMXP(unsigned char reg_index, unsigned short value, tRioStatusCode *status) = 0; - virtual unsigned short readMXP(unsigned char reg_index, tRioStatusCode *status) = 0; - - -private: - tPWM(const tPWM&); - void operator=(const tPWM&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_PWM_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_PWM_h__ +#define __nFRC_2017_17_0_2_PWM_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tPWM +{ +public: + tPWM(){} + virtual ~tPWM(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tPWM* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Period : 16; + unsigned MinHigh : 16; +#else + unsigned MinHigh : 16; + unsigned Period : 16; +#endif + }; + struct{ + unsigned value : 32; + }; + } tConfig; + + + + typedef enum + { + } tConfig_IfaceConstants; + + virtual void writeConfig(tConfig value, tRioStatusCode *status) = 0; + virtual void writeConfig_Period(unsigned short value, tRioStatusCode *status) = 0; + virtual void writeConfig_MinHigh(unsigned short value, tRioStatusCode *status) = 0; + virtual tConfig readConfig(tRioStatusCode *status) = 0; + virtual unsigned short readConfig_Period(tRioStatusCode *status) = 0; + virtual unsigned short readConfig_MinHigh(tRioStatusCode *status) = 0; + + + typedef enum + { + } tLoopTiming_IfaceConstants; + + virtual unsigned short readLoopTiming(tRioStatusCode *status) = 0; + + + typedef enum + { + kNumPeriodScaleMXPElements = 10, + } tPeriodScaleMXP_IfaceConstants; + + virtual void writePeriodScaleMXP(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readPeriodScaleMXP(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumPeriodScaleHdrElements = 10, + } tPeriodScaleHdr_IfaceConstants; + + virtual void writePeriodScaleHdr(unsigned char bitfield_index, unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readPeriodScaleHdr(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumZeroLatchElements = 20, + } tZeroLatch_IfaceConstants; + + virtual void writeZeroLatch(unsigned char bitfield_index, bool value, tRioStatusCode *status) = 0; + virtual bool readZeroLatch(unsigned char bitfield_index, tRioStatusCode *status) = 0; + + + + + typedef enum + { + kNumHdrRegisters = 10, + } tHdr_IfaceConstants; + + virtual void writeHdr(unsigned char reg_index, unsigned short value, tRioStatusCode *status) = 0; + virtual unsigned short readHdr(unsigned char reg_index, tRioStatusCode *status) = 0; + + + typedef enum + { + kNumMXPRegisters = 10, + } tMXP_IfaceConstants; + + virtual void writeMXP(unsigned char reg_index, unsigned short value, tRioStatusCode *status) = 0; + virtual unsigned short readMXP(unsigned char reg_index, tRioStatusCode *status) = 0; + + +private: + tPWM(const tPWM&); + void operator=(const tPWM&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_PWM_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h index 42abe5de4d..38414c4637 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h @@ -1,221 +1,221 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Power_h__ -#define __nFRC_2017_17_0_2_Power_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tPower -{ -public: - tPower(){} - virtual ~tPower(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tPower* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned User3V3 : 8; - unsigned User5V : 8; - unsigned User6V : 8; -#else - unsigned User6V : 8; - unsigned User5V : 8; - unsigned User3V3 : 8; -#endif - }; - struct{ - unsigned value : 24; - }; - } tStatus; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned OverCurrentFaultCount3V3 : 8; - unsigned OverCurrentFaultCount5V : 8; - unsigned OverCurrentFaultCount6V : 8; - unsigned UnderVoltageFaultCount5V : 8; -#else - unsigned UnderVoltageFaultCount5V : 8; - unsigned OverCurrentFaultCount6V : 8; - unsigned OverCurrentFaultCount5V : 8; - unsigned OverCurrentFaultCount3V3 : 8; -#endif - }; - struct{ - unsigned value : 32; - }; - } tFaultCounts; - typedef - union{ - struct{ -#ifdef __vxworks - unsigned User3V3 : 1; - unsigned User5V : 1; - unsigned User6V : 1; -#else - unsigned User6V : 1; - unsigned User5V : 1; - unsigned User3V3 : 1; -#endif - }; - struct{ - unsigned value : 3; - }; - } tDisable; - - - - typedef enum - { - } tUserVoltage3V3_IfaceConstants; - - virtual unsigned short readUserVoltage3V3(tRioStatusCode *status) = 0; - - - typedef enum - { - } tStatus_IfaceConstants; - - virtual tStatus readStatus(tRioStatusCode *status) = 0; - virtual unsigned char readStatus_User3V3(tRioStatusCode *status) = 0; - virtual unsigned char readStatus_User5V(tRioStatusCode *status) = 0; - virtual unsigned char readStatus_User6V(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUserVoltage6V_IfaceConstants; - - virtual unsigned short readUserVoltage6V(tRioStatusCode *status) = 0; - - - typedef enum - { - } tOnChipTemperature_IfaceConstants; - - virtual unsigned short readOnChipTemperature(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUserVoltage5V_IfaceConstants; - - virtual unsigned short readUserVoltage5V(tRioStatusCode *status) = 0; - - - typedef enum - { - } tResetFaultCounts_IfaceConstants; - - virtual void strobeResetFaultCounts(tRioStatusCode *status) = 0; - - - typedef enum - { - } tIntegratedIO_IfaceConstants; - - virtual unsigned short readIntegratedIO(tRioStatusCode *status) = 0; - - - typedef enum - { - } tMXP_DIOVoltage_IfaceConstants; - - virtual unsigned short readMXP_DIOVoltage(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUserCurrent3V3_IfaceConstants; - - virtual unsigned short readUserCurrent3V3(tRioStatusCode *status) = 0; - - - typedef enum - { - } tVinVoltage_IfaceConstants; - - virtual unsigned short readVinVoltage(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUserCurrent6V_IfaceConstants; - - virtual unsigned short readUserCurrent6V(tRioStatusCode *status) = 0; - - - typedef enum - { - } tUserCurrent5V_IfaceConstants; - - virtual unsigned short readUserCurrent5V(tRioStatusCode *status) = 0; - - - typedef enum - { - } tAOVoltage_IfaceConstants; - - virtual unsigned short readAOVoltage(tRioStatusCode *status) = 0; - - - typedef enum - { - } tFaultCounts_IfaceConstants; - - virtual tFaultCounts readFaultCounts(tRioStatusCode *status) = 0; - virtual unsigned char readFaultCounts_OverCurrentFaultCount3V3(tRioStatusCode *status) = 0; - virtual unsigned char readFaultCounts_OverCurrentFaultCount5V(tRioStatusCode *status) = 0; - virtual unsigned char readFaultCounts_OverCurrentFaultCount6V(tRioStatusCode *status) = 0; - virtual unsigned char readFaultCounts_UnderVoltageFaultCount5V(tRioStatusCode *status) = 0; - - - typedef enum - { - } tVinCurrent_IfaceConstants; - - virtual unsigned short readVinCurrent(tRioStatusCode *status) = 0; - - - typedef enum - { - } tDisable_IfaceConstants; - - virtual void writeDisable(tDisable value, tRioStatusCode *status) = 0; - virtual void writeDisable_User3V3(bool value, tRioStatusCode *status) = 0; - virtual void writeDisable_User5V(bool value, tRioStatusCode *status) = 0; - virtual void writeDisable_User6V(bool value, tRioStatusCode *status) = 0; - virtual tDisable readDisable(tRioStatusCode *status) = 0; - virtual bool readDisable_User3V3(tRioStatusCode *status) = 0; - virtual bool readDisable_User5V(tRioStatusCode *status) = 0; - virtual bool readDisable_User6V(tRioStatusCode *status) = 0; - - - - -private: - tPower(const tPower&); - void operator=(const tPower&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Power_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Power_h__ +#define __nFRC_2017_17_0_2_Power_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tPower +{ +public: + tPower(){} + virtual ~tPower(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tPower* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned User3V3 : 8; + unsigned User5V : 8; + unsigned User6V : 8; +#else + unsigned User6V : 8; + unsigned User5V : 8; + unsigned User3V3 : 8; +#endif + }; + struct{ + unsigned value : 24; + }; + } tStatus; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned OverCurrentFaultCount3V3 : 8; + unsigned OverCurrentFaultCount5V : 8; + unsigned OverCurrentFaultCount6V : 8; + unsigned UnderVoltageFaultCount5V : 8; +#else + unsigned UnderVoltageFaultCount5V : 8; + unsigned OverCurrentFaultCount6V : 8; + unsigned OverCurrentFaultCount5V : 8; + unsigned OverCurrentFaultCount3V3 : 8; +#endif + }; + struct{ + unsigned value : 32; + }; + } tFaultCounts; + typedef + union{ + struct{ +#ifdef __vxworks + unsigned User3V3 : 1; + unsigned User5V : 1; + unsigned User6V : 1; +#else + unsigned User6V : 1; + unsigned User5V : 1; + unsigned User3V3 : 1; +#endif + }; + struct{ + unsigned value : 3; + }; + } tDisable; + + + + typedef enum + { + } tUserVoltage3V3_IfaceConstants; + + virtual unsigned short readUserVoltage3V3(tRioStatusCode *status) = 0; + + + typedef enum + { + } tStatus_IfaceConstants; + + virtual tStatus readStatus(tRioStatusCode *status) = 0; + virtual unsigned char readStatus_User3V3(tRioStatusCode *status) = 0; + virtual unsigned char readStatus_User5V(tRioStatusCode *status) = 0; + virtual unsigned char readStatus_User6V(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUserVoltage6V_IfaceConstants; + + virtual unsigned short readUserVoltage6V(tRioStatusCode *status) = 0; + + + typedef enum + { + } tOnChipTemperature_IfaceConstants; + + virtual unsigned short readOnChipTemperature(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUserVoltage5V_IfaceConstants; + + virtual unsigned short readUserVoltage5V(tRioStatusCode *status) = 0; + + + typedef enum + { + } tResetFaultCounts_IfaceConstants; + + virtual void strobeResetFaultCounts(tRioStatusCode *status) = 0; + + + typedef enum + { + } tIntegratedIO_IfaceConstants; + + virtual unsigned short readIntegratedIO(tRioStatusCode *status) = 0; + + + typedef enum + { + } tMXP_DIOVoltage_IfaceConstants; + + virtual unsigned short readMXP_DIOVoltage(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUserCurrent3V3_IfaceConstants; + + virtual unsigned short readUserCurrent3V3(tRioStatusCode *status) = 0; + + + typedef enum + { + } tVinVoltage_IfaceConstants; + + virtual unsigned short readVinVoltage(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUserCurrent6V_IfaceConstants; + + virtual unsigned short readUserCurrent6V(tRioStatusCode *status) = 0; + + + typedef enum + { + } tUserCurrent5V_IfaceConstants; + + virtual unsigned short readUserCurrent5V(tRioStatusCode *status) = 0; + + + typedef enum + { + } tAOVoltage_IfaceConstants; + + virtual unsigned short readAOVoltage(tRioStatusCode *status) = 0; + + + typedef enum + { + } tFaultCounts_IfaceConstants; + + virtual tFaultCounts readFaultCounts(tRioStatusCode *status) = 0; + virtual unsigned char readFaultCounts_OverCurrentFaultCount3V3(tRioStatusCode *status) = 0; + virtual unsigned char readFaultCounts_OverCurrentFaultCount5V(tRioStatusCode *status) = 0; + virtual unsigned char readFaultCounts_OverCurrentFaultCount6V(tRioStatusCode *status) = 0; + virtual unsigned char readFaultCounts_UnderVoltageFaultCount5V(tRioStatusCode *status) = 0; + + + typedef enum + { + } tVinCurrent_IfaceConstants; + + virtual unsigned short readVinCurrent(tRioStatusCode *status) = 0; + + + typedef enum + { + } tDisable_IfaceConstants; + + virtual void writeDisable(tDisable value, tRioStatusCode *status) = 0; + virtual void writeDisable_User3V3(bool value, tRioStatusCode *status) = 0; + virtual void writeDisable_User5V(bool value, tRioStatusCode *status) = 0; + virtual void writeDisable_User6V(bool value, tRioStatusCode *status) = 0; + virtual tDisable readDisable(tRioStatusCode *status) = 0; + virtual bool readDisable_User3V3(tRioStatusCode *status) = 0; + virtual bool readDisable_User5V(tRioStatusCode *status) = 0; + virtual bool readDisable_User6V(tRioStatusCode *status) = 0; + + + + +private: + tPower(const tPower&); + void operator=(const tPower&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Power_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h index 049372079e..1a4c48a98f 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h @@ -1,69 +1,69 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_Relay_h__ -#define __nFRC_2017_17_0_2_Relay_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tRelay -{ -public: - tRelay(){} - virtual ~tRelay(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tRelay* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Forward : 4; - unsigned Reverse : 4; -#else - unsigned Reverse : 4; - unsigned Forward : 4; -#endif - }; - struct{ - unsigned value : 8; - }; - } tValue; - - - - typedef enum - { - } tValue_IfaceConstants; - - virtual void writeValue(tValue value, tRioStatusCode *status) = 0; - virtual void writeValue_Forward(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeValue_Reverse(unsigned char value, tRioStatusCode *status) = 0; - virtual tValue readValue(tRioStatusCode *status) = 0; - virtual unsigned char readValue_Forward(tRioStatusCode *status) = 0; - virtual unsigned char readValue_Reverse(tRioStatusCode *status) = 0; - - - - -private: - tRelay(const tRelay&); - void operator=(const tRelay&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_Relay_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_Relay_h__ +#define __nFRC_2017_17_0_2_Relay_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tRelay +{ +public: + tRelay(){} + virtual ~tRelay(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tRelay* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Forward : 4; + unsigned Reverse : 4; +#else + unsigned Reverse : 4; + unsigned Forward : 4; +#endif + }; + struct{ + unsigned value : 8; + }; + } tValue; + + + + typedef enum + { + } tValue_IfaceConstants; + + virtual void writeValue(tValue value, tRioStatusCode *status) = 0; + virtual void writeValue_Forward(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeValue_Reverse(unsigned char value, tRioStatusCode *status) = 0; + virtual tValue readValue(tRioStatusCode *status) = 0; + virtual unsigned char readValue_Forward(tRioStatusCode *status) = 0; + virtual unsigned char readValue_Reverse(tRioStatusCode *status) = 0; + + + + +private: + tRelay(const tRelay&); + void operator=(const tRelay&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_Relay_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h index 9f2f27e000..cc2755d18a 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h @@ -1,77 +1,77 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_SPI_h__ -#define __nFRC_2017_17_0_2_SPI_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tSPI -{ -public: - tSPI(){} - virtual ~tSPI(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tSPI* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned Hdr : 4; - unsigned MXP : 1; -#else - unsigned MXP : 1; - unsigned Hdr : 4; -#endif - }; - struct{ - unsigned value : 5; - }; - } tChipSelectActiveHigh; - - - - typedef enum - { - } tEnableDIO_IfaceConstants; - - virtual void writeEnableDIO(unsigned char value, tRioStatusCode *status) = 0; - virtual unsigned char readEnableDIO(tRioStatusCode *status) = 0; - - - typedef enum - { - } tChipSelectActiveHigh_IfaceConstants; - - virtual void writeChipSelectActiveHigh(tChipSelectActiveHigh value, tRioStatusCode *status) = 0; - virtual void writeChipSelectActiveHigh_Hdr(unsigned char value, tRioStatusCode *status) = 0; - virtual void writeChipSelectActiveHigh_MXP(unsigned char value, tRioStatusCode *status) = 0; - virtual tChipSelectActiveHigh readChipSelectActiveHigh(tRioStatusCode *status) = 0; - virtual unsigned char readChipSelectActiveHigh_Hdr(tRioStatusCode *status) = 0; - virtual unsigned char readChipSelectActiveHigh_MXP(tRioStatusCode *status) = 0; - - - - -private: - tSPI(const tSPI&); - void operator=(const tSPI&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_SPI_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_SPI_h__ +#define __nFRC_2017_17_0_2_SPI_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tSPI +{ +public: + tSPI(){} + virtual ~tSPI(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tSPI* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned Hdr : 4; + unsigned MXP : 1; +#else + unsigned MXP : 1; + unsigned Hdr : 4; +#endif + }; + struct{ + unsigned value : 5; + }; + } tChipSelectActiveHigh; + + + + typedef enum + { + } tEnableDIO_IfaceConstants; + + virtual void writeEnableDIO(unsigned char value, tRioStatusCode *status) = 0; + virtual unsigned char readEnableDIO(tRioStatusCode *status) = 0; + + + typedef enum + { + } tChipSelectActiveHigh_IfaceConstants; + + virtual void writeChipSelectActiveHigh(tChipSelectActiveHigh value, tRioStatusCode *status) = 0; + virtual void writeChipSelectActiveHigh_Hdr(unsigned char value, tRioStatusCode *status) = 0; + virtual void writeChipSelectActiveHigh_MXP(unsigned char value, tRioStatusCode *status) = 0; + virtual tChipSelectActiveHigh readChipSelectActiveHigh(tRioStatusCode *status) = 0; + virtual unsigned char readChipSelectActiveHigh_Hdr(tRioStatusCode *status) = 0; + virtual unsigned char readChipSelectActiveHigh_MXP(tRioStatusCode *status) = 0; + + + + +private: + tSPI(const tSPI&); + void operator=(const tSPI&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_SPI_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h index fd17f2cdd2..4228de8722 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h @@ -1,109 +1,109 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. -// Do Not Edit... this file is generated! - -#ifndef __nFRC_2017_17_0_2_SysWatchdog_h__ -#define __nFRC_2017_17_0_2_SysWatchdog_h__ - -#include "../tSystem.h" -#include "../tSystemInterface.h" - -namespace nFPGA -{ -namespace nFRC_2017_17_0_2 -{ - -class tSysWatchdog -{ -public: - tSysWatchdog(){} - virtual ~tSysWatchdog(){} - - virtual tSystemInterface* getSystemInterface() = 0; - static tSysWatchdog* create(tRioStatusCode *status); - - typedef enum - { - kNumSystems = 1, - } tIfaceConstants; - - typedef - union{ - struct{ -#ifdef __vxworks - unsigned SystemActive : 1; - unsigned PowerAlive : 1; - unsigned SysDisableCount : 15; - unsigned PowerDisableCount : 15; -#else - unsigned PowerDisableCount : 15; - unsigned SysDisableCount : 15; - unsigned PowerAlive : 1; - unsigned SystemActive : 1; -#endif - }; - struct{ - unsigned value : 32; - }; - } tStatus; - - - - typedef enum - { - } tStatus_IfaceConstants; - - virtual tStatus readStatus(tRioStatusCode *status) = 0; - virtual bool readStatus_SystemActive(tRioStatusCode *status) = 0; - virtual bool readStatus_PowerAlive(tRioStatusCode *status) = 0; - virtual unsigned short readStatus_SysDisableCount(tRioStatusCode *status) = 0; - virtual unsigned short readStatus_PowerDisableCount(tRioStatusCode *status) = 0; - - - typedef enum - { - } tCommand_IfaceConstants; - - virtual void writeCommand(unsigned short value, tRioStatusCode *status) = 0; - virtual unsigned short readCommand(tRioStatusCode *status) = 0; - - - typedef enum - { - } tChallenge_IfaceConstants; - - virtual unsigned char readChallenge(tRioStatusCode *status) = 0; - - - typedef enum - { - } tActive_IfaceConstants; - - virtual void writeActive(bool value, tRioStatusCode *status) = 0; - virtual bool readActive(tRioStatusCode *status) = 0; - - - typedef enum - { - } tTimer_IfaceConstants; - - virtual unsigned int readTimer(tRioStatusCode *status) = 0; - - - typedef enum - { - } tForcedKills_IfaceConstants; - - virtual unsigned short readForcedKills(tRioStatusCode *status) = 0; - - - - -private: - tSysWatchdog(const tSysWatchdog&); - void operator=(const tSysWatchdog&); -}; - -} -} - -#endif // __nFRC_2017_17_0_2_SysWatchdog_h__ +// Copyright (c) National Instruments 2008. All Rights Reserved. +// Do Not Edit... this file is generated! + +#ifndef __nFRC_2017_17_0_2_SysWatchdog_h__ +#define __nFRC_2017_17_0_2_SysWatchdog_h__ + +#include "../tSystem.h" +#include "../tSystemInterface.h" + +namespace nFPGA +{ +namespace nFRC_2017_17_0_2 +{ + +class tSysWatchdog +{ +public: + tSysWatchdog(){} + virtual ~tSysWatchdog(){} + + virtual tSystemInterface* getSystemInterface() = 0; + static tSysWatchdog* create(tRioStatusCode *status); + + typedef enum + { + kNumSystems = 1, + } tIfaceConstants; + + typedef + union{ + struct{ +#ifdef __vxworks + unsigned SystemActive : 1; + unsigned PowerAlive : 1; + unsigned SysDisableCount : 15; + unsigned PowerDisableCount : 15; +#else + unsigned PowerDisableCount : 15; + unsigned SysDisableCount : 15; + unsigned PowerAlive : 1; + unsigned SystemActive : 1; +#endif + }; + struct{ + unsigned value : 32; + }; + } tStatus; + + + + typedef enum + { + } tStatus_IfaceConstants; + + virtual tStatus readStatus(tRioStatusCode *status) = 0; + virtual bool readStatus_SystemActive(tRioStatusCode *status) = 0; + virtual bool readStatus_PowerAlive(tRioStatusCode *status) = 0; + virtual unsigned short readStatus_SysDisableCount(tRioStatusCode *status) = 0; + virtual unsigned short readStatus_PowerDisableCount(tRioStatusCode *status) = 0; + + + typedef enum + { + } tCommand_IfaceConstants; + + virtual void writeCommand(unsigned short value, tRioStatusCode *status) = 0; + virtual unsigned short readCommand(tRioStatusCode *status) = 0; + + + typedef enum + { + } tChallenge_IfaceConstants; + + virtual unsigned char readChallenge(tRioStatusCode *status) = 0; + + + typedef enum + { + } tActive_IfaceConstants; + + virtual void writeActive(bool value, tRioStatusCode *status) = 0; + virtual bool readActive(tRioStatusCode *status) = 0; + + + typedef enum + { + } tTimer_IfaceConstants; + + virtual unsigned int readTimer(tRioStatusCode *status) = 0; + + + typedef enum + { + } tForcedKills_IfaceConstants; + + virtual unsigned short readForcedKills(tRioStatusCode *status) = 0; + + + + +private: + tSysWatchdog(const tSysWatchdog&); + void operator=(const tSysWatchdog&); +}; + +} +} + +#endif // __nFRC_2017_17_0_2_SysWatchdog_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/printFpgaVersion.h b/ni-libraries/include/FRC_FPGA_ChipObject/printFpgaVersion.h index 788f1df6d9..9ef9bf4370 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/printFpgaVersion.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/printFpgaVersion.h @@ -1,42 +1,42 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. - -#ifndef __printFPGAVersion_h__ -#define __printFPGAVersion_h__ - -namespace nFPGA -{ - -template -inline void printFPGAVersion(ttGlobal &global) -{ - tRioStatusCode cleanStatus=0; - uint32_t hardwareGuid[4]; - tSystemInterface &system = *global.getSystemInterface(); - system.getHardwareFpgaSignature(hardwareGuid, &cleanStatus); - const uint32_t *softwareGuid = system.getExpectedFPGASignature(); - printf("FPGA Hardware GUID: 0x"); - for(int i=0; i<4; i++) - { - printf("%08X", hardwareGuid[i]); - } - printf("\n"); - printf("FPGA Software GUID: 0x"); - for(int i=0; i<4; i++) - { - printf("%08X", softwareGuid[i]); - } - printf("\n"); - uint16_t fpgaHardwareVersion = global.readVersion(&cleanStatus); - uint16_t fpgaSoftwareVersion = system.getExpectedFPGAVersion(); - printf("FPGA Hardware Version: %X\n", fpgaHardwareVersion); - printf("FPGA Software Version: %X\n", fpgaSoftwareVersion); - uint32_t fpgaHardwareRevision = global.readRevision(&cleanStatus); - uint32_t fpgaSoftwareRevision = system.getExpectedFPGARevision(); - printf("FPGA Hardware Revision: %X.%X.%X\n", (fpgaHardwareRevision >> 20) & 0xFFF, (fpgaHardwareRevision >> 12) & 0xFF, fpgaHardwareRevision & 0xFFF); - printf("FPGA Software Revision: %X.%X.%X\n", (fpgaSoftwareRevision >> 20) & 0xFFF, (fpgaSoftwareRevision >> 12) & 0xFF, fpgaSoftwareRevision & 0xFFF); -} - -} - -#endif // __printFPGAVersion_h__ - +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#ifndef __printFPGAVersion_h__ +#define __printFPGAVersion_h__ + +namespace nFPGA +{ + +template +inline void printFPGAVersion(ttGlobal &global) +{ + tRioStatusCode cleanStatus=0; + uint32_t hardwareGuid[4]; + tSystemInterface &system = *global.getSystemInterface(); + system.getHardwareFpgaSignature(hardwareGuid, &cleanStatus); + const uint32_t *softwareGuid = system.getExpectedFPGASignature(); + printf("FPGA Hardware GUID: 0x"); + for(int i=0; i<4; i++) + { + printf("%08X", hardwareGuid[i]); + } + printf("\n"); + printf("FPGA Software GUID: 0x"); + for(int i=0; i<4; i++) + { + printf("%08X", softwareGuid[i]); + } + printf("\n"); + uint16_t fpgaHardwareVersion = global.readVersion(&cleanStatus); + uint16_t fpgaSoftwareVersion = system.getExpectedFPGAVersion(); + printf("FPGA Hardware Version: %X\n", fpgaHardwareVersion); + printf("FPGA Software Version: %X\n", fpgaSoftwareVersion); + uint32_t fpgaHardwareRevision = global.readRevision(&cleanStatus); + uint32_t fpgaSoftwareRevision = system.getExpectedFPGARevision(); + printf("FPGA Hardware Revision: %X.%X.%X\n", (fpgaHardwareRevision >> 20) & 0xFFF, (fpgaHardwareRevision >> 12) & 0xFF, fpgaHardwareRevision & 0xFFF); + printf("FPGA Software Revision: %X.%X.%X\n", (fpgaSoftwareRevision >> 20) & 0xFFF, (fpgaSoftwareRevision >> 12) & 0xFF, fpgaSoftwareRevision & 0xFFF); +} + +} + +#endif // __printFPGAVersion_h__ + diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h b/ni-libraries/include/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h index 8fa593511f..2c7f54e867 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/tDMAChannelDescriptor.h @@ -1,17 +1,17 @@ -// Describes the information needed to configure a DMA channel. -// Copyright (c) National Instruments 2008. All Rights Reserved. - -#include - -#ifndef __tDMAChannelDescriptor_h__ -#define __tDMAChannelDescriptor_h__ - -struct tDMAChannelDescriptor -{ - uint32_t channel; - uint32_t baseAddress; - uint32_t depth; - bool targetToHost; -}; - -#endif // __tDMAChannelDescriptor_h__ +// Describes the information needed to configure a DMA channel. +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#include + +#ifndef __tDMAChannelDescriptor_h__ +#define __tDMAChannelDescriptor_h__ + +struct tDMAChannelDescriptor +{ + uint32_t channel; + uint32_t baseAddress; + uint32_t depth; + bool targetToHost; +}; + +#endif // __tDMAChannelDescriptor_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/tDMAManager.h b/ni-libraries/include/FRC_FPGA_ChipObject/tDMAManager.h index cb95203cca..c2ba6b4f21 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/tDMAManager.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/tDMAManager.h @@ -1,41 +1,41 @@ -// Class for handling DMA transfers. -// Copyright (c) National Instruments 2008. All Rights Reserved. - -#ifndef __tDMAManager_h__ -#define __tDMAManager_h__ - -#include "tSystem.h" -#include - -namespace nFPGA -{ -class tDMAManager : public tSystem -{ -public: - tDMAManager(uint32_t dmaChannel, uint32_t hostBufferSize, tRioStatusCode *status); - ~tDMAManager(); - void start(tRioStatusCode *status); - void stop(tRioStatusCode *status); - bool isStarted() {return _started;} - void read( - uint32_t* buf, - size_t num, - uint32_t timeout, - size_t* remaining, - tRioStatusCode *status); - void write( - uint32_t* buf, - size_t num, - uint32_t timeout, - size_t* remaining, - tRioStatusCode *status); -private: - bool _started; - uint32_t _dmaChannel; - uint32_t _hostBufferSize; - -}; - -} - -#endif // __tDMAManager_h__ +// Class for handling DMA transfers. +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#ifndef __tDMAManager_h__ +#define __tDMAManager_h__ + +#include "tSystem.h" +#include + +namespace nFPGA +{ +class tDMAManager : public tSystem +{ +public: + tDMAManager(uint32_t dmaChannel, uint32_t hostBufferSize, tRioStatusCode *status); + ~tDMAManager(); + void start(tRioStatusCode *status); + void stop(tRioStatusCode *status); + bool isStarted() {return _started;} + void read( + uint32_t* buf, + size_t num, + uint32_t timeout, + size_t* remaining, + tRioStatusCode *status); + void write( + uint32_t* buf, + size_t num, + uint32_t timeout, + size_t* remaining, + tRioStatusCode *status); +private: + bool _started; + uint32_t _dmaChannel; + uint32_t _hostBufferSize; + +}; + +} + +#endif // __tDMAManager_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/tInterruptManager.h b/ni-libraries/include/FRC_FPGA_ChipObject/tInterruptManager.h index cb6783df0f..6c84b540f4 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/tInterruptManager.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/tInterruptManager.h @@ -1,61 +1,61 @@ -// Class for handling interrupts. -// Copyright (c) National Instruments 2008. All Rights Reserved. - -#ifndef __tInterruptManager_h__ -#define __tInterruptManager_h__ - -#include "tSystem.h" - -namespace ni -{ - namespace dsc - { - namespace osdep - { - class CriticalSection; - } - } -} - -namespace nFPGA -{ - -typedef void (*tInterruptHandler)(uint32_t interruptAssertedMask, void *param); - -class tInterruptManager : public tSystem -{ -public: - tInterruptManager(uint32_t interruptMask, bool watcher, tRioStatusCode *status); - ~tInterruptManager(); - void registerHandler(tInterruptHandler handler, void *param, tRioStatusCode *status); - uint32_t watch(int32_t timeoutInMs, bool ignorePrevious, tRioStatusCode *status); - void enable(tRioStatusCode *status); - void disable(tRioStatusCode *status); - bool isEnabled(tRioStatusCode *status); -private: - class tInterruptThread; - friend class tInterruptThread; - void handler(); - static int handlerWrapper(tInterruptManager *pInterrupt); - - void acknowledge(tRioStatusCode *status); - void reserve(tRioStatusCode *status); - void unreserve(tRioStatusCode *status); - tInterruptHandler _handler; - uint32_t _interruptMask; - tInterruptThread *_thread; - NiFpga_IrqContext _rioContext; - bool _watcher; - bool _enabled; - void *_userParam; - - // maintain the interrupts that are already dealt with. - static uint32_t _globalInterruptMask; - static ni::dsc::osdep::CriticalSection *_globalInterruptMaskSemaphore; -}; - -} - - -#endif // __tInterruptManager_h__ - +// Class for handling interrupts. +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#ifndef __tInterruptManager_h__ +#define __tInterruptManager_h__ + +#include "tSystem.h" + +namespace ni +{ + namespace dsc + { + namespace osdep + { + class CriticalSection; + } + } +} + +namespace nFPGA +{ + +typedef void (*tInterruptHandler)(uint32_t interruptAssertedMask, void *param); + +class tInterruptManager : public tSystem +{ +public: + tInterruptManager(uint32_t interruptMask, bool watcher, tRioStatusCode *status); + ~tInterruptManager(); + void registerHandler(tInterruptHandler handler, void *param, tRioStatusCode *status); + uint32_t watch(int32_t timeoutInMs, bool ignorePrevious, tRioStatusCode *status); + void enable(tRioStatusCode *status); + void disable(tRioStatusCode *status); + bool isEnabled(tRioStatusCode *status); +private: + class tInterruptThread; + friend class tInterruptThread; + void handler(); + static int handlerWrapper(tInterruptManager *pInterrupt); + + void acknowledge(tRioStatusCode *status); + void reserve(tRioStatusCode *status); + void unreserve(tRioStatusCode *status); + tInterruptHandler _handler; + uint32_t _interruptMask; + tInterruptThread *_thread; + NiFpga_IrqContext _rioContext; + bool _watcher; + bool _enabled; + void *_userParam; + + // maintain the interrupts that are already dealt with. + static uint32_t _globalInterruptMask; + static ni::dsc::osdep::CriticalSection *_globalInterruptMaskSemaphore; +}; + +} + + +#endif // __tInterruptManager_h__ + diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/tSystem.h b/ni-libraries/include/FRC_FPGA_ChipObject/tSystem.h index b059e5184c..cf54b05009 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/tSystem.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/tSystem.h @@ -1,48 +1,48 @@ -// Base class for generated chip objects -// Copyright (c) National Instruments 2008. All Rights Reserved. - -#ifndef __tSystem_h__ -#define __tSystem_h__ - -#include "fpgainterfacecapi/NiFpga.h" -typedef NiFpga_Status tRioStatusCode; - -#define FRC_FPGA_PRELOAD_BITFILE - -typedef uint32_t NiFpga_Session; - -namespace nFPGA -{ - -class tSystem -{ -public: - tSystem(tRioStatusCode *status); - ~tSystem(); - void getFpgaGuid(uint32_t *guid_ptr, tRioStatusCode *status); - void reset(tRioStatusCode *status); - -protected: - static NiFpga_Session _DeviceHandle; - -#ifdef FRC_FPGA_PRELOAD_BITFILE - void NiFpga_SharedOpen_common(const char* bitfile); - NiFpga_Status NiFpga_SharedOpen(const char* bitfile, - const char* signature, - const char* resource, - uint32_t attribute, - NiFpga_Session* session); - NiFpga_Status NiFpgaLv_SharedOpen(const char* const bitfile, - const char* const apiSignature, - const char* const resource, - const uint32_t attribute, - NiFpga_Session* const session); -private: - static char *_FileName; - static char *_Bitfile; -#endif -}; - -} - -#endif // __tSystem_h__ +// Base class for generated chip objects +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#ifndef __tSystem_h__ +#define __tSystem_h__ + +#include "fpgainterfacecapi/NiFpga.h" +typedef NiFpga_Status tRioStatusCode; + +#define FRC_FPGA_PRELOAD_BITFILE + +typedef uint32_t NiFpga_Session; + +namespace nFPGA +{ + +class tSystem +{ +public: + tSystem(tRioStatusCode *status); + ~tSystem(); + void getFpgaGuid(uint32_t *guid_ptr, tRioStatusCode *status); + void reset(tRioStatusCode *status); + +protected: + static NiFpga_Session _DeviceHandle; + +#ifdef FRC_FPGA_PRELOAD_BITFILE + void NiFpga_SharedOpen_common(const char* bitfile); + NiFpga_Status NiFpga_SharedOpen(const char* bitfile, + const char* signature, + const char* resource, + uint32_t attribute, + NiFpga_Session* session); + NiFpga_Status NiFpgaLv_SharedOpen(const char* const bitfile, + const char* const apiSignature, + const char* const resource, + const uint32_t attribute, + NiFpga_Session* const session); +private: + static char *_FileName; + static char *_Bitfile; +#endif +}; + +} + +#endif // __tSystem_h__ diff --git a/ni-libraries/include/FRC_FPGA_ChipObject/tSystemInterface.h b/ni-libraries/include/FRC_FPGA_ChipObject/tSystemInterface.h index 859418787e..ee8ca62a73 100644 --- a/ni-libraries/include/FRC_FPGA_ChipObject/tSystemInterface.h +++ b/ni-libraries/include/FRC_FPGA_ChipObject/tSystemInterface.h @@ -1,27 +1,27 @@ -// Copyright (c) National Instruments 2008. All Rights Reserved. - -#ifndef __tSystemInterface_h__ -#define __tSystemInterface_h__ - -namespace nFPGA -{ - -class tSystemInterface -{ -public: - tSystemInterface(){} - virtual ~tSystemInterface(){} - - virtual const uint16_t getExpectedFPGAVersion()=0; - virtual const uint32_t getExpectedFPGARevision()=0; - virtual const uint32_t * const getExpectedFPGASignature()=0; - virtual void getHardwareFpgaSignature(uint32_t *guid_ptr, tRioStatusCode *status)=0; - virtual uint32_t getLVHandle(tRioStatusCode *status)=0; - virtual uint32_t getHandle()=0; - virtual void reset(tRioStatusCode *status)=0; -}; - -} - -#endif // __tSystemInterface_h__ - +// Copyright (c) National Instruments 2008. All Rights Reserved. + +#ifndef __tSystemInterface_h__ +#define __tSystemInterface_h__ + +namespace nFPGA +{ + +class tSystemInterface +{ +public: + tSystemInterface(){} + virtual ~tSystemInterface(){} + + virtual const uint16_t getExpectedFPGAVersion()=0; + virtual const uint32_t getExpectedFPGARevision()=0; + virtual const uint32_t * const getExpectedFPGASignature()=0; + virtual void getHardwareFpgaSignature(uint32_t *guid_ptr, tRioStatusCode *status)=0; + virtual uint32_t getLVHandle(tRioStatusCode *status)=0; + virtual uint32_t getHandle()=0; + virtual void reset(tRioStatusCode *status)=0; +}; + +} + +#endif // __tSystemInterface_h__ + diff --git a/ni-libraries/include/FRC_NetworkCommunication/UsageReporting.h b/ni-libraries/include/FRC_NetworkCommunication/UsageReporting.h index d0eafaf1b1..bd54b906d1 100644 --- a/ni-libraries/include/FRC_NetworkCommunication/UsageReporting.h +++ b/ni-libraries/include/FRC_NetworkCommunication/UsageReporting.h @@ -87,6 +87,7 @@ namespace nUsageReporting kLanguage_CPlusPlus = 2, kLanguage_Java = 3, kLanguage_Python = 4, + kLanguage_DotNet = 5, kCANPlugin_BlackJagBridge = 1, kCANPlugin_2CAN = 2, diff --git a/ni-libraries/include/i2clib/i2c-lib.h b/ni-libraries/include/i2clib/i2c-lib.h index b34cb33d0a..cd893aaadb 100644 --- a/ni-libraries/include/i2clib/i2c-lib.h +++ b/ni-libraries/include/i2clib/i2c-lib.h @@ -1,16 +1,16 @@ -#ifndef __I2C_LIB_H__ -#define __I2C_LIB_H__ - -#ifdef __cplusplus -extern "C" { -#endif -int i2clib_open(const char *device); -void i2clib_close(int handle); -int i2clib_read(int handle, uint8_t dev_addr, char *recv_buf, int32_t recv_size); -int i2clib_write(int handle, uint8_t dev_addr, const char *send_buf, int32_t send_size); -int i2clib_writeread(int handle, uint8_t dev_addr, const char *send_buf, int32_t send_size, char *recv_buf, int32_t recv_size); -#ifdef __cplusplus -} -#endif - +#ifndef __I2C_LIB_H__ +#define __I2C_LIB_H__ + +#ifdef __cplusplus +extern "C" { +#endif +int i2clib_open(const char *device); +void i2clib_close(int handle); +int i2clib_read(int handle, uint8_t dev_addr, char *recv_buf, int32_t recv_size); +int i2clib_write(int handle, uint8_t dev_addr, const char *send_buf, int32_t send_size); +int i2clib_writeread(int handle, uint8_t dev_addr, const char *send_buf, int32_t send_size, char *recv_buf, int32_t recv_size); +#ifdef __cplusplus +} +#endif + #endif /* __I2C_LIB_H__ */ \ No newline at end of file diff --git a/ni-libraries/include/spilib/spi-lib.h b/ni-libraries/include/spilib/spi-lib.h index b5c2a7ae75..d30701f672 100644 --- a/ni-libraries/include/spilib/spi-lib.h +++ b/ni-libraries/include/spilib/spi-lib.h @@ -1,19 +1,19 @@ -#ifndef __SPI_LIB_H__ -#define __SPI_LIB_H__ - -#ifdef __cplusplus -extern "C" { -#endif -int spilib_open(const char *device); -void spilib_close(int handle); -int spilib_setspeed(int handle, uint32_t speed); -int spilib_setbitsperword(int handle, uint8_t bpw); -int spilib_setopts(int handle, int msb_first, int sample_on_trailing, int clk_idle_high); -int spilib_read(int handle, char *recv_buf, int32_t size); -int spilib_write(int handle, const char *send_buf, int32_t size); -int spilib_writeread(int handle, const char *send_buf, char *recv_buf, int32_t size); -#ifdef __cplusplus -} -#endif - +#ifndef __SPI_LIB_H__ +#define __SPI_LIB_H__ + +#ifdef __cplusplus +extern "C" { +#endif +int spilib_open(const char *device); +void spilib_close(int handle); +int spilib_setspeed(int handle, uint32_t speed); +int spilib_setbitsperword(int handle, uint8_t bpw); +int spilib_setopts(int handle, int msb_first, int sample_on_trailing, int clk_idle_high); +int spilib_read(int handle, char *recv_buf, int32_t size); +int spilib_write(int handle, const char *send_buf, int32_t size); +int spilib_writeread(int handle, const char *send_buf, char *recv_buf, int32_t size); +#ifdef __cplusplus +} +#endif + #endif /* __SPI_LIB_H__ */ \ No newline at end of file diff --git a/ni-libraries/lib/libFRC_NetworkCommunication.so.17.0.0 b/ni-libraries/lib/libFRC_NetworkCommunication.so.17.0.0 index cfd32d865b..894e3c024f 100644 Binary files a/ni-libraries/lib/libFRC_NetworkCommunication.so.17.0.0 and b/ni-libraries/lib/libFRC_NetworkCommunication.so.17.0.0 differ diff --git a/ni-libraries/lib/libFRC_NetworkCommunicationLV.so.17.0.0 b/ni-libraries/lib/libFRC_NetworkCommunicationLV.so.17.0.0 index 0f6a5f2872..8fcac73f44 100644 Binary files a/ni-libraries/lib/libFRC_NetworkCommunicationLV.so.17.0.0 and b/ni-libraries/lib/libFRC_NetworkCommunicationLV.so.17.0.0 differ diff --git a/ni-libraries/ni-libraries.gradle b/ni-libraries/ni-libraries.gradle index 487dd0e58b..aa56080947 100644 --- a/ni-libraries/ni-libraries.gradle +++ b/ni-libraries/ni-libraries.gradle @@ -7,7 +7,7 @@ task patchNiLibraries() { FileTree chipTree = fileTree(dir: "$rootDir/ni-libraries/include/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace") chipTree.each {File file -> String contents = file.getText( 'UTF-8' ) - contents = contents.replaceAll( '#include \"tSystemInterface.h\"', '#include \"../tSystem.h\"\r\n#include \"../tSystemInterface.h\"' ) + contents = contents.replaceAll( '#include \"tSystemInterface.h\"', '#include \"../tSystem.h\"\n#include \"../tSystemInterface.h\"' ) file.write( contents, 'UTF-8' ) }