Keep track of FPGA time rollovers with 64-bit time.

This allows both greater than 72 minute (2^32 * 1 us) timeouts and also
gracefully handles notifiers across the FPGA time counter rollover.

Change-Id: Ibde0b903155f60b618b0ca4d5f8f6dd49f90b020

wpilibc/simulation/src/Utility.cpp

@@ -159,7 +159,7 @@ bool wpi_assertNotEqual_impl(int valueA,
  *
  * @return The current time in microseconds according to the FPGA (since FPGA reset).
  */
-uint32_t GetFPGATime()
+uint64_t GetFPGATime()
 {
 	return wpilib::internal::simTime * 1e6;
 }