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Renamed folders for consistency, using sim/athena/shared schema (#27)

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Rename the following folders:
hal/lib/Athena -> hal/lib/athena
hal/lib/Desktop -> hal/lib/sim
hal/lib/Shared -> hal/lib/shared
wpilibc/Athena -> wpilibc/athena
wpilibc/simulation -> wpilibc/sim

Windows users may need to run gradlew clean after updating.
This commit is contained in:
Peter Mitrano
2016-05-22 17:55:51 -04:00
committed by Peter Johnson
parent 54092378e9
commit e71f454b9d
308 changed files with 14 additions and 14 deletions
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28
wpilibc/athena/include/ControllerPower.h Normal file
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/*----------------------------------------------------------------------------*/
/* Copyright (c) FIRST 2011-2016. All Rights Reserved. */
/* Open Source Software - may be modified and shared by FRC teams. The code */
/* must be accompanied by the FIRST BSD license file in the root directory of */
/* the project. */
/*----------------------------------------------------------------------------*/
#ifndef __CONTROLLER_POWER_H__
#define __CONTROLLER_POWER_H__
class ControllerPower {
public:
static double GetInputVoltage();
static double GetInputCurrent();
static double GetVoltage3V3();
static double GetCurrent3V3();
static bool GetEnabled3V3();
static int GetFaultCount3V3();
static double GetVoltage5V();
static double GetCurrent5V();
static bool GetEnabled5V();
static int GetFaultCount5V();
static double GetVoltage6V();
static double GetCurrent6V();
static bool GetEnabled6V();
static int GetFaultCount6V();
};
#endif