Reverts the 2017 Image for Beta 1 (#264)

* Revert "Updated the rpath to point to the correct location for the Java integration tests. (#262)"

This reverts commit c313dde03a.

* Revert "Update image 2017 v5 (#254)"

This reverts commit 8d1c51b7e9.

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/nInterfaceGlobals.h

@@ -1,15 +1,15 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_nInterfaceGlobals_h__
-#define __nFRC_2017_17_0_1_nInterfaceGlobals_h__
+#ifndef __nFRC_2016_16_1_0_nInterfaceGlobals_h__
+#define __nFRC_2016_16_1_0_nInterfaceGlobals_h__
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
    extern unsigned int g_currentTargetClass;
 }
 }
 
-#endif // __nFRC_2017_17_0_1_nInterfaceGlobals_h__
+#endif // __nFRC_2016_16_1_0_nInterfaceGlobals_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAI.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_AI_h__
-#define __nFRC_2017_17_0_1_AI_h__
+#ifndef __nFRC_2016_16_1_0_AI_h__
+#define __nFRC_2016_16_1_0_AI_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tAI
@@ -140,4 +140,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_AI_h__
+#endif // __nFRC_2016_16_1_0_AI_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAO.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_AO_h__
-#define __nFRC_2017_17_0_1_AO_h__
+#ifndef __nFRC_2016_16_1_0_AO_h__
+#define __nFRC_2016_16_1_0_AO_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tAO
@@ -47,4 +47,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_AO_h__
+#endif // __nFRC_2016_16_1_0_AO_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccel.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Accel_h__
-#define __nFRC_2017_17_0_1_Accel_h__
+#ifndef __nFRC_2016_16_1_0_Accel_h__
+#define __nFRC_2016_16_1_0_Accel_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tAccel
@@ -99,4 +99,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Accel_h__
+#endif // __nFRC_2016_16_1_0_Accel_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAccumulator.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Accumulator_h__
-#define __nFRC_2017_17_0_1_Accumulator_h__
+#ifndef __nFRC_2016_16_1_0_Accumulator_h__
+#define __nFRC_2016_16_1_0_Accumulator_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tAccumulator
@@ -84,4 +84,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Accumulator_h__
+#endif // __nFRC_2016_16_1_0_Accumulator_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAlarm.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Alarm_h__
-#define __nFRC_2017_17_0_1_Alarm_h__
+#ifndef __nFRC_2016_16_1_0_Alarm_h__
+#define __nFRC_2016_16_1_0_Alarm_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tAlarm
@@ -54,4 +54,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Alarm_h__
+#endif // __nFRC_2016_16_1_0_Alarm_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tAnalogTrigger.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_AnalogTrigger_h__
-#define __nFRC_2017_17_0_1_AnalogTrigger_h__
+#ifndef __nFRC_2016_16_1_0_AnalogTrigger_h__
+#define __nFRC_2016_16_1_0_AnalogTrigger_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tAnalogTrigger
@@ -126,4 +126,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_AnalogTrigger_h__
+#endif // __nFRC_2016_16_1_0_AnalogTrigger_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tBIST.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_BIST_h__
-#define __nFRC_2017_17_0_1_BIST_h__
+#ifndef __nFRC_2016_16_1_0_BIST_h__
+#define __nFRC_2016_16_1_0_BIST_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tBIST
@@ -87,4 +87,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_BIST_h__
+#endif // __nFRC_2016_16_1_0_BIST_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tCounter.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Counter_h__
-#define __nFRC_2017_17_0_1_Counter_h__
+#ifndef __nFRC_2016_16_1_0_Counter_h__
+#define __nFRC_2016_16_1_0_Counter_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tCounter
@@ -216,4 +216,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Counter_h__
+#endif // __nFRC_2016_16_1_0_Counter_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDIO.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_DIO_h__
-#define __nFRC_2017_17_0_1_DIO_h__
+#ifndef __nFRC_2016_16_1_0_DIO_h__
+#define __nFRC_2016_16_1_0_DIO_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tDIO
@@ -30,13 +30,11 @@ public:
       struct{
 #ifdef __vxworks
          unsigned Headers : 10;
-         unsigned SPIPort : 5;
-         unsigned Reserved : 1;
+         unsigned Reserved : 6;
          unsigned MXP : 16;
 #else
          unsigned MXP : 16;
-         unsigned Reserved : 1;
-         unsigned SPIPort : 5;
+         unsigned Reserved : 6;
          unsigned Headers : 10;
 #endif
       };
@@ -49,13 +47,11 @@ public:
       struct{
 #ifdef __vxworks
          unsigned Headers : 10;
-         unsigned SPIPort : 5;
-         unsigned Reserved : 1;
+         unsigned Reserved : 6;
          unsigned MXP : 16;
 #else
          unsigned MXP : 16;
-         unsigned Reserved : 1;
-         unsigned SPIPort : 5;
+         unsigned Reserved : 6;
          unsigned Headers : 10;
 #endif
       };
@@ -68,13 +64,11 @@ public:
       struct{
 #ifdef __vxworks
          unsigned Headers : 10;
-         unsigned SPIPort : 5;
-         unsigned Reserved : 1;
+         unsigned Reserved : 6;
          unsigned MXP : 16;
 #else
          unsigned MXP : 16;
-         unsigned Reserved : 1;
-         unsigned SPIPort : 5;
+         unsigned Reserved : 6;
          unsigned Headers : 10;
 #endif
       };
@@ -87,13 +81,11 @@ public:
       struct{
 #ifdef __vxworks
          unsigned Headers : 10;
-         unsigned SPIPort : 5;
-         unsigned Reserved : 1;
+         unsigned Reserved : 6;
          unsigned MXP : 16;
 #else
          unsigned MXP : 16;
-         unsigned Reserved : 1;
-         unsigned SPIPort : 5;
+         unsigned Reserved : 6;
          unsigned Headers : 10;
 #endif
       };
@@ -110,12 +102,10 @@ public:
 
    virtual void writeDO(tDO value, tRioStatusCode *status) = 0;
    virtual void writeDO_Headers(unsigned short value, tRioStatusCode *status) = 0;
-   virtual void writeDO_SPIPort(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeDO_Reserved(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeDO_MXP(unsigned short value, tRioStatusCode *status) = 0;
    virtual tDO readDO(tRioStatusCode *status) = 0;
    virtual unsigned short readDO_Headers(tRioStatusCode *status) = 0;
-   virtual unsigned char readDO_SPIPort(tRioStatusCode *status) = 0;
    virtual unsigned char readDO_Reserved(tRioStatusCode *status) = 0;
    virtual unsigned short readDO_MXP(tRioStatusCode *status) = 0;
 
@@ -153,12 +143,10 @@ public:
 
    virtual void writeOutputEnable(tOutputEnable value, tRioStatusCode *status) = 0;
    virtual void writeOutputEnable_Headers(unsigned short value, tRioStatusCode *status) = 0;
-   virtual void writeOutputEnable_SPIPort(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeOutputEnable_Reserved(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeOutputEnable_MXP(unsigned short value, tRioStatusCode *status) = 0;
    virtual tOutputEnable readOutputEnable(tRioStatusCode *status) = 0;
    virtual unsigned short readOutputEnable_Headers(tRioStatusCode *status) = 0;
-   virtual unsigned char readOutputEnable_SPIPort(tRioStatusCode *status) = 0;
    virtual unsigned char readOutputEnable_Reserved(tRioStatusCode *status) = 0;
    virtual unsigned short readOutputEnable_MXP(tRioStatusCode *status) = 0;
 
@@ -178,12 +166,10 @@ public:
 
    virtual void writePulse(tPulse value, tRioStatusCode *status) = 0;
    virtual void writePulse_Headers(unsigned short value, tRioStatusCode *status) = 0;
-   virtual void writePulse_SPIPort(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writePulse_Reserved(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writePulse_MXP(unsigned short value, tRioStatusCode *status) = 0;
    virtual tPulse readPulse(tRioStatusCode *status) = 0;
    virtual unsigned short readPulse_Headers(tRioStatusCode *status) = 0;
-   virtual unsigned char readPulse_SPIPort(tRioStatusCode *status) = 0;
    virtual unsigned char readPulse_Reserved(tRioStatusCode *status) = 0;
    virtual unsigned short readPulse_MXP(tRioStatusCode *status) = 0;
 
@@ -194,7 +180,6 @@ public:
 
    virtual tDI readDI(tRioStatusCode *status) = 0;
    virtual unsigned short readDI_Headers(tRioStatusCode *status) = 0;
-   virtual unsigned char readDI_SPIPort(tRioStatusCode *status) = 0;
    virtual unsigned char readDI_Reserved(tRioStatusCode *status) = 0;
    virtual unsigned short readDI_MXP(tRioStatusCode *status) = 0;
 
@@ -260,4 +245,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_DIO_h__
+#endif // __nFRC_2016_16_1_0_DIO_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tDMA.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_DMA_h__
-#define __nFRC_2017_17_0_1_DMA_h__
+#ifndef __nFRC_2016_16_1_0_DMA_h__
+#define __nFRC_2016_16_1_0_DMA_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tDMA
@@ -194,4 +194,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_DMA_h__
+#endif // __nFRC_2016_16_1_0_DMA_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tEncoder.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Encoder_h__
-#define __nFRC_2017_17_0_1_Encoder_h__
+#ifndef __nFRC_2016_16_1_0_Encoder_h__
+#define __nFRC_2016_16_1_0_Encoder_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tEncoder
@@ -196,4 +196,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Encoder_h__
+#endif // __nFRC_2016_16_1_0_Encoder_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tGlobal.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Global_h__
-#define __nFRC_2017_17_0_1_Global_h__
+#ifndef __nFRC_2016_16_1_0_Global_h__
+#define __nFRC_2016_16_1_0_Global_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tGlobal
@@ -29,6 +29,7 @@ public:
    union{
       struct{
 #ifdef __vxworks
+         unsigned Radio : 8;
          unsigned Comm : 8;
          unsigned Mode : 8;
          unsigned RSL : 1;
@@ -36,10 +37,11 @@ public:
          unsigned RSL : 1;
          unsigned Mode : 8;
          unsigned Comm : 8;
+         unsigned Radio : 8;
 #endif
       };
       struct{
-         unsigned value : 17;
+         unsigned value : 25;
       };
    } tLEDs;
 
@@ -50,10 +52,12 @@ public:
    } tLEDs_IfaceConstants;
 
    virtual void writeLEDs(tLEDs value, tRioStatusCode *status) = 0;
+   virtual void writeLEDs_Radio(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeLEDs_Comm(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeLEDs_Mode(unsigned char value, tRioStatusCode *status) = 0;
    virtual void writeLEDs_RSL(bool value, tRioStatusCode *status) = 0;
    virtual tLEDs readLEDs(tRioStatusCode *status) = 0;
+   virtual unsigned char readLEDs_Radio(tRioStatusCode *status) = 0;
    virtual unsigned char readLEDs_Comm(tRioStatusCode *status) = 0;
    virtual unsigned char readLEDs_Mode(tRioStatusCode *status) = 0;
    virtual bool readLEDs_RSL(tRioStatusCode *status) = 0;
@@ -97,4 +101,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Global_h__
+#endif // __nFRC_2016_16_1_0_Global_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tInterrupt.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Interrupt_h__
-#define __nFRC_2017_17_0_1_Interrupt_h__
+#ifndef __nFRC_2016_16_1_0_Interrupt_h__
+#define __nFRC_2016_16_1_0_Interrupt_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tInterrupt
@@ -97,4 +97,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Interrupt_h__
+#endif // __nFRC_2016_16_1_0_Interrupt_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPWM.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_PWM_h__
-#define __nFRC_2017_17_0_1_PWM_h__
+#ifndef __nFRC_2016_16_1_0_PWM_h__
+#define __nFRC_2016_16_1_0_PWM_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tPWM
@@ -117,4 +117,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_PWM_h__
+#endif // __nFRC_2016_16_1_0_PWM_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tPower.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Power_h__
-#define __nFRC_2017_17_0_1_Power_h__
+#ifndef __nFRC_2016_16_1_0_Power_h__
+#define __nFRC_2016_16_1_0_Power_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tPower
@@ -217,4 +217,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Power_h__
+#endif // __nFRC_2016_16_1_0_Power_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tRelay.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_Relay_h__
-#define __nFRC_2017_17_0_1_Relay_h__
+#ifndef __nFRC_2016_16_1_0_Relay_h__
+#define __nFRC_2016_16_1_0_Relay_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tRelay
@@ -65,4 +65,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_Relay_h__
+#endif // __nFRC_2016_16_1_0_Relay_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSPI.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_SPI_h__
-#define __nFRC_2017_17_0_1_SPI_h__
+#ifndef __nFRC_2016_16_1_0_SPI_h__
+#define __nFRC_2016_16_1_0_SPI_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tSPI
@@ -43,14 +43,6 @@ public:
 
 
 
-   typedef enum
-   {
-   } tEnableDIO_IfaceConstants;
-
-   virtual void writeEnableDIO(unsigned char value, tRioStatusCode *status) = 0;
-   virtual unsigned char readEnableDIO(tRioStatusCode *status) = 0;
-
-
    typedef enum
    {
    } tChipSelectActiveHigh_IfaceConstants;
@@ -73,4 +65,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_SPI_h__
+#endif // __nFRC_2016_16_1_0_SPI_h__

hal/lib/athena/FRC_FPGA_ChipObject/nRoboRIO_FPGANamespace/tSysWatchdog.h

@@ -1,14 +1,14 @@
 // Copyright (c) National Instruments 2008.  All Rights Reserved.
 // Do Not Edit... this file is generated!
 
-#ifndef __nFRC_2017_17_0_1_SysWatchdog_h__
-#define __nFRC_2017_17_0_1_SysWatchdog_h__
+#ifndef __nFRC_2016_16_1_0_SysWatchdog_h__
+#define __nFRC_2016_16_1_0_SysWatchdog_h__
 
 #include "tSystemInterface.h"
 
 namespace nFPGA
 {
-namespace nFRC_2017_17_0_1
+namespace nFRC_2016_16_1_0
 {
 
 class tSysWatchdog
@@ -105,4 +105,4 @@ private:
 }
 }
 
-#endif // __nFRC_2017_17_0_1_SysWatchdog_h__
+#endif // __nFRC_2016_16_1_0_SysWatchdog_h__