4 Commits

Author	SHA1	Message	Date
Thomas Clark	e73c8d06eb	Fixed a few more small TODOs ... Timer::Get now compensates for the FPGA time rolling over after 71 minutes UltraSonic::Ping doesn't bother disabling automatic mode, since it asserts that it's not in automatic mode on the line before. Change-Id: I6b0f45327c453abd8a846ec8da0f9676e210d909	2014-08-04 15:25:41 -04:00
Colby Skeggs	0bb13d86ea	Completed artf2662: removed Start()/Stop() in Encoders and Counters. ... Change-Id: I11954bb5f66e54461455637d79013c1071f5d00f	2014-07-31 10:31:36 -04:00
thomasclark	58021f7397	Removed analog and digital module numbers ... AnalogModule and DigitalModule classes still exist, at least until they are refactored into the classes that use them. Change-Id: I5544d5418822f19d54ba0a5d651e64fad8b7b10d	2014-06-13 17:57:40 -04:00
thomasclark	bb50f4b134	C++ testing ... Made a toplevel directory for C++ and C++ tests Change-Id: I4bc2074a7036ec7fe79568b411637a5bee9eb5b3 Added the C++ testing framework and one test Change-Id: I1e80a1e16b251a49666820a9d4c8caa025da9785	2014-06-02 15:36:18 -04:00