Peter Johnson e944ae9aca [hal,wpilib] Rename FPGA clock to monotonic clock (#8672) ...

- Remove status return from HAL level (clock getting should never fail)
- Remove 32-bit timestamp expand function
- Make monotonic_clock.hpp (formerly fpga_clock.hpp) header-only and
move to root hal include directory

2026-03-15 15:08:41 -07:00

..

src

[hal,wpilib] Rename FPGA clock to monotonic clock (#8672)

2026-03-15 15:08:41 -07:00

BUILD.bazel

HAND FIXES: Update maven info

2025-11-07 23:09:21 -08:00

build.gradle

[build] Migrate to Gradle version catalogs (#8524)

2026-02-20 15:31:33 -08:00

CMakeLists.txt

HAND FIXES: Fixup gradle / cmake / styleguide

2025-11-07 23:09:21 -08:00

generate_hids.py

HAND FIX - Fixup pregen files

2025-11-07 23:09:21 -08:00

generate_pwm_motor_controllers.py

HAND FIX - Fixup pregen files

2025-11-07 23:09:21 -08:00

generate_wpilibj.py

[bazel] Add scripts to validate pregeneration tools (#7690)

2025-05-13 22:01:47 -07:00

generate.bzl

[bazel] Add scripts to validate pregeneration tools (#7690)

2025-05-13 22:01:47 -07:00

wpilibj-config.cmake

Adds CMake Builds (#1015)

2018-05-02 21:15:30 -07:00