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https://github.com/wpilibsuite/allwpilib
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87a64ccedc
The existing raw time has an issue where it jumps around, as in the FPGA if the frequency is not a multiple or divisor of 25 Mhz it jumps around by 1 every second. While waiting on an FPGA change, update the API to make raw output give nanoseconds rather then a scaled value. This does a longer read cycle to get the correct value, but in the future if a fast FPGA function is added this can be easily changed.
124 lines
2.9 KiB
C++
124 lines
2.9 KiB
C++
// Copyright (c) FIRST and other WPILib contributors.
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// Open Source Software; you can modify and/or share it under the terms of
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// the WPILib BSD license file in the root directory of this project.
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#include <jni.h>
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#include "HALUtil.h"
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#include "edu_wpi_first_hal_DutyCycleJNI.h"
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#include "hal/DutyCycle.h"
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using namespace hal;
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extern "C" {
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: initialize
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* Signature: (II)I
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*/
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JNIEXPORT jint JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_initialize
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(JNIEnv* env, jclass, jint digitalSourceHandle, jint analogTriggerType)
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{
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int32_t status = 0;
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auto handle = HAL_InitializeDutyCycle(
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static_cast<HAL_Handle>(digitalSourceHandle),
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static_cast<HAL_AnalogTriggerType>(analogTriggerType), &status);
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CheckStatus(env, status);
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return handle;
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}
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: free
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* Signature: (I)V
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*/
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JNIEXPORT void JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_free
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(JNIEnv*, jclass, jint handle)
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{
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HAL_FreeDutyCycle(static_cast<HAL_DutyCycleHandle>(handle));
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}
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: getFrequency
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* Signature: (I)I
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*/
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JNIEXPORT jint JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_getFrequency
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(JNIEnv* env, jclass, jint handle)
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{
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int32_t status = 0;
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auto retVal = HAL_GetDutyCycleFrequency(
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static_cast<HAL_DutyCycleHandle>(handle), &status);
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CheckStatus(env, status);
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return retVal;
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}
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: getOutput
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* Signature: (I)D
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*/
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JNIEXPORT jdouble JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_getOutput
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(JNIEnv* env, jclass, jint handle)
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{
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int32_t status = 0;
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auto retVal =
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HAL_GetDutyCycleOutput(static_cast<HAL_DutyCycleHandle>(handle), &status);
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CheckStatus(env, status);
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return retVal;
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}
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: getHighTime
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* Signature: (I)I
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*/
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JNIEXPORT jint JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_getHighTime
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(JNIEnv* env, jclass, jint handle)
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{
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int32_t status = 0;
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auto retVal = HAL_GetDutyCycleHighTime(
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static_cast<HAL_DutyCycleHandle>(handle), &status);
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CheckStatus(env, status);
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return retVal;
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}
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: getOutputScaleFactor
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* Signature: (I)I
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*/
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JNIEXPORT jint JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_getOutputScaleFactor
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(JNIEnv* env, jclass, jint handle)
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{
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int32_t status = 0;
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auto retVal = HAL_GetDutyCycleOutputScaleFactor(
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static_cast<HAL_DutyCycleHandle>(handle), &status);
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CheckStatus(env, status);
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return retVal;
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}
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/*
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* Class: edu_wpi_first_hal_DutyCycleJNI
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* Method: getFPGAIndex
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* Signature: (I)I
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*/
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JNIEXPORT jint JNICALL
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Java_edu_wpi_first_hal_DutyCycleJNI_getFPGAIndex
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(JNIEnv* env, jclass, jint handle)
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{
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int32_t status = 0;
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auto retVal = HAL_GetDutyCycleFPGAIndex(
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static_cast<HAL_DutyCycleHandle>(handle), &status);
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CheckStatus(env, status);
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return retVal;
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}
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} // extern "C"
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