mirror of
https://github.com/wpilibsuite/allwpilib
synced 2026-06-21 01:01:43 +00:00
The changes made in this commit do not affect any actual code,
they are purely aesthetic. I ran clang-format with google style
over all .h/.cpp files in wpilibc that weren't in wpilibC++Sim
or gtest, and the eclipse formatter over all of the Java files
using the Google eclipse formatting configuration.
Change-Id: I9627bca0bc103c398ecc1c5ba17467193291ae63
40 lines
1.3 KiB
C++
40 lines
1.3 KiB
C++
/*----------------------------------------------------------------------------*/
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/* Copyright (c) FIRST 2008. All Rights Reserved.
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*/
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/* Open Source Software - may be modified and shared by FRC teams. The code */
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/* must be accompanied by the FIRST BSD license file in $(WIND_BASE)/WPILib. */
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/*----------------------------------------------------------------------------*/
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#pragma once
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#include "Resource.h"
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#include "SensorBase.h"
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#include "HAL/HAL.hpp"
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#include "HAL/cpp/Synchronized.hpp"
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#include "Port.h"
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/**
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* SolenoidBase class is the common base class for the Solenoid and
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* DoubleSolenoid classes.
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*/
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class SolenoidBase : public SensorBase {
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public:
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virtual ~SolenoidBase();
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uint8_t GetAll(int module = 0) const;
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uint8_t GetPCMSolenoidBlackList(int module) const;
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bool GetPCMSolenoidVoltageStickyFault(int module) const;
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bool GetPCMSolenoidVoltageFault(int module) const;
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void ClearAllPCMStickyFaults(int module);
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protected:
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explicit SolenoidBase(uint8_t pcmID);
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void Set(uint8_t value, uint8_t mask, int module);
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virtual void InitSolenoid() = 0;
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const static int m_maxModules = 63;
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const static int m_maxPorts = 8;
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static void* m_ports[m_maxModules][m_maxPorts];
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uint32_t m_moduleNumber; ///< Slot number where the module is plugged into
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///the chassis.
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static Resource* m_allocated;
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};
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