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https://github.com/wpilibsuite/allwpilib
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87a64ccedc
The existing raw time has an issue where it jumps around, as in the FPGA if the frequency is not a multiple or divisor of 25 Mhz it jumps around by 1 every second. While waiting on an FPGA change, update the API to make raw output give nanoseconds rather then a scaled value. This does a longer read cycle to get the correct value, but in the future if a fast FPGA function is added this can be easily changed.
130 lines
3.9 KiB
C++
130 lines
3.9 KiB
C++
// Copyright (c) FIRST and other WPILib contributors.
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// Open Source Software; you can modify and/or share it under the terms of
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// the WPILib BSD license file in the root directory of this project.
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#include "hal/DutyCycle.h"
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#include "HALInitializer.h"
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#include "PortsInternal.h"
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#include "hal/Errors.h"
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#include "hal/handles/HandlesInternal.h"
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#include "hal/handles/LimitedHandleResource.h"
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#include "mockdata/DutyCycleDataInternal.h"
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using namespace hal;
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namespace {
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struct DutyCycle {
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uint8_t index;
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};
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struct Empty {};
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} // namespace
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static LimitedHandleResource<HAL_DutyCycleHandle, DutyCycle, kNumDutyCycles,
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HAL_HandleEnum::DutyCycle>* dutyCycleHandles;
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namespace hal::init {
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void InitializeDutyCycle() {
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static LimitedHandleResource<HAL_DutyCycleHandle, DutyCycle, kNumDutyCycles,
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HAL_HandleEnum::DutyCycle>
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dcH;
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dutyCycleHandles = &dcH;
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}
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} // namespace hal::init
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extern "C" {
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HAL_DutyCycleHandle HAL_InitializeDutyCycle(HAL_Handle digitalSourceHandle,
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HAL_AnalogTriggerType triggerType,
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int32_t* status) {
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hal::init::CheckInit();
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HAL_DutyCycleHandle handle = dutyCycleHandles->Allocate();
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if (handle == HAL_kInvalidHandle) {
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*status = NO_AVAILABLE_RESOURCES;
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return HAL_kInvalidHandle;
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}
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auto dutyCycle = dutyCycleHandles->Get(handle);
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if (dutyCycle == nullptr) { // would only occur on thread issue
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*status = HAL_HANDLE_ERROR;
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return HAL_kInvalidHandle;
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}
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int16_t index = getHandleIndex(handle);
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SimDutyCycleData[index].digitalChannel = getHandleIndex(digitalSourceHandle);
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SimDutyCycleData[index].initialized = true;
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SimDutyCycleData[index].simDevice = 0;
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dutyCycle->index = index;
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return handle;
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}
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void HAL_FreeDutyCycle(HAL_DutyCycleHandle dutyCycleHandle) {
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auto dutyCycle = dutyCycleHandles->Get(dutyCycleHandle);
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dutyCycleHandles->Free(dutyCycleHandle);
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if (dutyCycle == nullptr) {
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return;
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}
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SimDutyCycleData[dutyCycle->index].initialized = false;
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}
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void HAL_SetDutyCycleSimDevice(HAL_EncoderHandle handle,
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HAL_SimDeviceHandle device) {
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auto dutyCycle = dutyCycleHandles->Get(handle);
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if (dutyCycle == nullptr) {
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return;
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}
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SimDutyCycleData[dutyCycle->index].simDevice = device;
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}
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int32_t HAL_GetDutyCycleFrequency(HAL_DutyCycleHandle dutyCycleHandle,
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int32_t* status) {
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auto dutyCycle = dutyCycleHandles->Get(dutyCycleHandle);
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if (dutyCycle == nullptr) {
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*status = HAL_HANDLE_ERROR;
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return 0;
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}
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return SimDutyCycleData[dutyCycle->index].frequency;
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}
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double HAL_GetDutyCycleOutput(HAL_DutyCycleHandle dutyCycleHandle,
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int32_t* status) {
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auto dutyCycle = dutyCycleHandles->Get(dutyCycleHandle);
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if (dutyCycle == nullptr) {
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*status = HAL_HANDLE_ERROR;
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return 0;
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}
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return SimDutyCycleData[dutyCycle->index].output;
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}
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int32_t HAL_GetDutyCycleHighTime(HAL_DutyCycleHandle dutyCycleHandle,
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int32_t* status) {
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auto dutyCycle = dutyCycleHandles->Get(dutyCycleHandle);
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if (dutyCycle == nullptr) {
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*status = HAL_HANDLE_ERROR;
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return 0;
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}
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if (SimDutyCycleData[dutyCycle->index].frequency == 0) {
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return 0;
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}
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double periodSeconds = 1.0 / SimDutyCycleData[dutyCycle->index].frequency;
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double periodNanoSeconds = periodSeconds * 1e9;
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return periodNanoSeconds * SimDutyCycleData[dutyCycle->index].output;
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}
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int32_t HAL_GetDutyCycleOutputScaleFactor(HAL_DutyCycleHandle dutyCycleHandle,
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int32_t* status) {
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return 4e7 - 1;
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}
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int32_t HAL_GetDutyCycleFPGAIndex(HAL_DutyCycleHandle dutyCycleHandle,
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int32_t* status) {
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auto dutyCycle = dutyCycleHandles->Get(dutyCycleHandle);
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if (dutyCycle == nullptr) {
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*status = HAL_HANDLE_ERROR;
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return -1;
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}
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return dutyCycle->index;
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}
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} // extern "C"
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