mirror of
https://github.com/wpilibsuite/allwpilib
synced 2026-06-22 01:11:42 +00:00
e71f454b9d
Rename the following folders: hal/lib/Athena -> hal/lib/athena hal/lib/Desktop -> hal/lib/sim hal/lib/Shared -> hal/lib/shared wpilibc/Athena -> wpilibc/athena wpilibc/simulation -> wpilibc/sim Windows users may need to run gradlew clean after updating.
59 lines
1.6 KiB
C++
59 lines
1.6 KiB
C++
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#ifndef __LoadOut_h__
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#define __LoadOut_h__
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#ifdef WIN32
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#include <vxWorks_compat.h>
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#define EXPORT_FUNC __declspec(dllexport) __cdecl
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#elif defined (__vxworks)
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#include <vxWorks.h>
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#define EXPORT_FUNC
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#else
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#include <stdint.h>
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#define EXPORT_FUNC
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#endif
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#define kMaxModuleNumber 2
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namespace nLoadOut
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{
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#if defined(__vxworks) || defined(SIMULATION)
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typedef enum {
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kModuleType_Unknown = 0x00,
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kModuleType_Analog = 0x01,
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kModuleType_Digital = 0x02,
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kModuleType_Solenoid = 0x03,
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} tModuleType;
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bool EXPORT_FUNC getModulePresence(tModuleType moduleType, uint8_t moduleNumber);
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#endif
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typedef enum {
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kTargetClass_Unknown = 0x00,
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kTargetClass_FRC1 = 0x10,
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kTargetClass_FRC2 = 0x20,
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kTargetClass_FRC3 = 0x30,
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kTargetClass_RoboRIO = 0x40,
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#if defined(__vxworks) || defined(SIMULATION)
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kTargetClass_FRC2_Analog = kTargetClass_FRC2 | kModuleType_Analog,
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kTargetClass_FRC2_Digital = kTargetClass_FRC2 | kModuleType_Digital,
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kTargetClass_FRC2_Solenoid = kTargetClass_FRC2 | kModuleType_Solenoid,
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#endif
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kTargetClass_FamilyMask = 0xF0,
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kTargetClass_ModuleMask = 0x0F,
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} tTargetClass;
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tTargetClass EXPORT_FUNC getTargetClass();
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}
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(__vxworks) || defined(SIMULATION)
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uint32_t EXPORT_FUNC FRC_NetworkCommunication_nLoadOut_getModulePresence(uint32_t moduleType, uint8_t moduleNumber);
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#endif
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uint32_t EXPORT_FUNC FRC_NetworkCommunication_nLoadOut_getTargetClass();
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#ifdef __cplusplus
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}
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#endif
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#endif // __LoadOut_h__
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